2.5.3.1.3. CONF_DONE and INIT_DONE
For Intel Agilex devices, both
CONF_DONE
and
INIT_DONE
share multiplexed
SDM_IO
pins.
Previous device families implement the
CONF_DONE
and
INIT_DONE
pins as open drains with a weak internal pull-up.
The
CONF_DONE
signal indicates that the configuration bitstream is received successfully. The
INIT_DONE
pin indicates that the
device operates within the design.
In the current implementation, you cannot wire an Intel Agilex
CONF_DONE
or
INIT_DONE
signal with the
nSTATUS
signal
from previous device families. Otherwise,
CONF_DONE
and
INIT_DONE
behave as these signals behaved in earlier device
families. If you assign
CONF_DONE
and
INIT_DONE
to
SDM_IO16
and
SDM_IO0
, weak internal pull-downs pull these pins low
at power-on reset. Ensure you specify these pins in the Intel Quartus Prime Software or in the Intel Quartus Prime settings
file, (
.qsf
).
CONF_DONE
and
INIT_DONE
are low prior to and during configuration.
CONF_DONE
asserts when the device
finishes receiving configuration data.
INIT_DONE
asserts when the device enters user mode.
Note:
The entire device does not enter user mode simultaneously. Intel recommends that you follow the
on page 134 to hold your application logic in the reset state until the entire FPGA fabric is in user
mode.
CONF_DONE
and
INIT_DONE
are optional signals. You can use these pins for other functions that the Intel Quartus Prime Pro
Edition Device and Pin Options menu defines.
2.5.3.1.4. SDM_IO Pins
Intel Agilex devices include 17
SDM_IO
pins that you can configure to implement specific functions such as
CONF_DONE
and
INIT_DONE
. The configuration bitstream controls the pin locations for the
SDM_IO
pins.
Internal Intel Agilex circuitry pulls
SDM_IO0
,
SDM_IO8
and
SDM_IO16
weakly low through a 20 kΩ resistor. Internal Intel
Agilex circuitry pulls all other
SDM_IO
pins weakly high during power-on.
2. Intel Agilex Configuration Details
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Intel
®
Agilex
™
Configuration User Guide
38
