Glossary-3
GLOSSARY
deassert The
term
deassert refers to the act of making a signal
inactive (disabled). The polarity (high/low) is defined
by the signal name. Active-low signals are designated
by a pound symbol (#) suffix; active-high signals have
no suffix. To deassert RD# is to drive it high; to
deassert ALE is to drive it low.
doping
The process of introducing a periodic table Group III
or Group V element into a Group IV element (e.g.,
silicon). A Group III impurity (e.g., indium or
gallium) results in a p-type material. A Group V
impurity (e.g., arsenic or antimony) results in an n-
type material.
double word
A 32-bit unit of data. In memory, a double word
comprises four contiguous bytes.
dword
See double word.
edge-triggered
The mode in which a device or component recognizes
a falling edge (high-to-low transition), a rising edge
(low-to-high transition), or a rising or falling edge of
an input signal as the assertion of that signal. See also
level-triggered.
encryption array
An array of key bytes used to encrypt user code in the
on-chip code memory as that code is read; protects
against unauthorized access to user’s code.
EPROM
Erasable, programmable read-only memory
external address
A 16-bit or 17-bit address presented on the device
pins. The address decoded by an external device
depends on how many of these address bits the
external system uses. See also internal address.
FET
Field-effect transistor.
idle mode
The power conservation mode that freezes the core
clocks but leaves the peripheral clocks running.
input leakage
Current leakage from an input pin to power or ground.
integer
Any member of the set consisting of the positive and
negative whole numbers and zero.
internal address
The 24-bit address that the device generates. See also
external address.
Summary of Contents for 8XC251SA
Page 2: ......
Page 3: ...May 1996 8XC251SA 8XC251SB 8XC251SP 8XC251SQ Embedded Microcontroller User s Manual...
Page 18: ......
Page 19: ...1 Guide to This Manual...
Page 20: ......
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Page 31: ...2 Architectural Overview...
Page 32: ......
Page 41: ...3 Address Spaces...
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Page 63: ...4 Device Configuration...
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Page 81: ...5 Programming...
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Page 102: ......
Page 103: ...6 Interrupt System...
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Page 121: ...7 Input Output Ports...
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Page 132: ......
Page 133: ...8 Timer Counters and Watchdog Timer...
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Page 153: ...9 Programmable Counter Array...
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Page 171: ...10 Serial I O Port...
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Page 187: ...11 Minimum Hardware Setup...
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Page 197: ...12 Special Operating Modes...
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Page 207: ...13 External Memory Interface...
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Page 239: ...14 Programming and Verifying Nonvolatile Memory...
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Page 251: ...A Instruction Set Reference...
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Page 390: ......
Page 391: ...B Signal Descriptions...
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Page 400: ......
Page 401: ...C Registers...
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Page 437: ...Glossary...
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Page 447: ...Index...
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