Intel 8XC251SA, User Manual

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8XC251SA, SB, SP, SQ USER’S MANUAL
A-132
Binary Mode Source Mode
Bytes: 1 2
States: 4 5
Hex Code in: Binary Mode = [Encoding]
Source Mode = [Encoding]
Operation: XCHD
(A).3:0
→ ←
((Ri)).3:0
XRL <dest>,<src>
Function:
Logical Exclusive-OR for byte variables
Description:
Performs the bitwise logical Exclusive-OR operation (
∀
) between the specified variables,
storing the results in the destination. The destination operand can be the accumulator, a
register, or a direct address.
The two operands allow 12 addressing mode combinations. When the destination is the
accumulator or a register, the source addressing can be register, direct, register-indirect, or
immediate; when the destination is a direct address, the source can be the accumulator or
immediate data.
(Note: When this instruction is used to modify an output port, the value used as the original
port data is read from the output data latch, not the input pins.)
Flags:
Example: The accumulator contains 0C3H (11000011B) and R0 contains 0AAH (10101010B). After
executing the instruction
XRL A,R0
the accumulator contains 69H (01101001B).
When the destination is a directly addressed byte, this instruction can complement combina-
tions of bits in any RAM location or hardware register. The pattern of bits to be comple-
mented is then determined by a mask byte, either a constant contained in the instruction or
a variable computed in the accumulator at run time. The instruction
XRL P1,#00110001B
complements bits 5, 4, and 0 of output Port 1.
Variations
XRL dir8,A
Binary Mode Source Mode
Bytes: 2 2
States: 2† 2†
†If this instruction addresses a port (P x , x = 0–3), add 2 states.
[Encoding] 1 1 0 1 0 1 1 i
CY AC OV N Z
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