8XC251SA, SB, SP, SQ USER’S MANUAL
A-34
AJMP addr11
Function:
Absolute jump
Description:
Transfers program execution to the specified address, which is formed at run time by
concatenating the upper five bits of the PC (after incrementing the PC twice), opcode bits 7–
5, and the second byte of the instruction. The destination must therefore be within the same
2-Kbyte “page” of program memory as the first byte of the instruction following AJMP.
Flags:
Example:
The label "JMPADR" is at program memory location 0123H. After executing the instruction
AJMP JMPADR
at location 0345H, the PC contains 0123H.
Binary Mode
Source Mode
Bytes:
2
2
States:
3
3
Hex Code in:
Binary Mode = [Encoding]
Source Mode = [Encoding]
Operation:
AJMP
(PC)
←
(PC) + 2
(PC.10:0)
←
page address
ANL <dest>,<src>
Function:
Logical-AND
Description:
Performs the bitwise logical-AND (
Λ
) operation between the specified variables and stores
the results in the destination variable.
The two operands allow 10 addressing mode combinations. When the destination is the
register or accumulator, the source can use register, direct, register-indirect, or immediate
addressing; when the destination is a direct address, the source can be the accumulator or
immediate data.
Note: When this instruction is used to modify an output port, the value used as the original
port data is read from the output data latch, not the input pins.
Flags:
CY
AC
OV
N
Z
—
—
—
—
—
[Encoding]
a10 a9 a8 0
0 0 0 1
a7 a6 a5 a4
a3 a2 a1 a0
CY
AC
OV
N
Z
—
—
—
✓
✓
Summary of Contents for 8XC251SA
Page 2: ......
Page 3: ...May 1996 8XC251SA 8XC251SB 8XC251SP 8XC251SQ Embedded Microcontroller User s Manual...
Page 18: ......
Page 19: ...1 Guide to This Manual...
Page 20: ......
Page 30: ......
Page 31: ...2 Architectural Overview...
Page 32: ......
Page 41: ...3 Address Spaces...
Page 42: ......
Page 63: ...4 Device Configuration...
Page 64: ......
Page 81: ...5 Programming...
Page 82: ......
Page 102: ......
Page 103: ...6 Interrupt System...
Page 104: ......
Page 120: ......
Page 121: ...7 Input Output Ports...
Page 122: ......
Page 132: ......
Page 133: ...8 Timer Counters and Watchdog Timer...
Page 134: ......
Page 153: ...9 Programmable Counter Array...
Page 154: ......
Page 170: ......
Page 171: ...10 Serial I O Port...
Page 172: ......
Page 187: ...11 Minimum Hardware Setup...
Page 188: ......
Page 197: ...12 Special Operating Modes...
Page 198: ......
Page 206: ......
Page 207: ...13 External Memory Interface...
Page 208: ......
Page 239: ...14 Programming and Verifying Nonvolatile Memory...
Page 240: ......
Page 250: ......
Page 251: ...A Instruction Set Reference...
Page 252: ......
Page 390: ......
Page 391: ...B Signal Descriptions...
Page 392: ......
Page 400: ......
Page 401: ...C Registers...
Page 402: ......
Page 436: ......
Page 437: ...Glossary...
Page 438: ......
Page 446: ......
Page 447: ...Index...
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