6-13
INTERRUPT SYSTEM
6.7.2.3
Latency Calculations
Assume the use of a zero-wait-state external memory where current instructions, the ISR, and the
stack are located within the same 64-Kbyte memory region (compatible with memory maps for
MCS 51 microcontrollers.) Further, assume there are 3 states yet to complete in the current 21-
state DIV instruction when INT0# requests service. Also assume INT0# has made the request one
state prior to the sample state (as in Figure 6-7). Unlike in Figure 6-7, the response time for this
assumption is three state times as the current instruction completes in time for the branch to occur.
Latency calculations begin with the minimum fixed latency of 16 states. From Table 6-6, one state
is added for an INT0# request from external hardware; two states are added for external execu-
tion; and four states for an external stack in the current 64-Kbyte region. Finally, three states are
added for the current instruction to complete. The actual latency is 26 states. Worst-case latency
calculations predict 43 states for this example due to inclusion of total DIV instruction time (less
one state).
Table 6-6. Interrupt Latency Variables
Variable
INT0#,
INT1#,
T2EX
External
Execution
Page
Mode
>64K
Jump to
ISR (1)
External
Memory
Wait
State
External
Stack
External
Stack
>64K (1)
External
Stack
Wait State
Number
of
States
Added
1
2
1
8
1 per
bus cycle
4
8
1 per
bus cycle
NOTES:
1.
<64K/>64K means inside/outside the 64-Kbyte memory region where code is executing.
2.
Base-case fixed time is 16 states and assumes:
— A 2-byte instruction is the first ISR byte.
— Internal execution
— <64K jump to ISR
— Internal stack
— Internal peripheral interrupt
Table 6-7. Actual vs. Predicted Latency Calculations
Latency Factors
Actual
Predicted
Base Case Minimum Fixed Time
16
16
INT0# External Request
1
1
External Execution
2
2
<64K Byte Stack Location
4
4
Execution Time for Current DIV Instruction
3
20
TOTAL
26
43
Summary of Contents for 8XC251SA
Page 2: ......
Page 3: ...May 1996 8XC251SA 8XC251SB 8XC251SP 8XC251SQ Embedded Microcontroller User s Manual...
Page 18: ......
Page 19: ...1 Guide to This Manual...
Page 20: ......
Page 30: ......
Page 31: ...2 Architectural Overview...
Page 32: ......
Page 41: ...3 Address Spaces...
Page 42: ......
Page 63: ...4 Device Configuration...
Page 64: ......
Page 81: ...5 Programming...
Page 82: ......
Page 102: ......
Page 103: ...6 Interrupt System...
Page 104: ......
Page 120: ......
Page 121: ...7 Input Output Ports...
Page 122: ......
Page 132: ......
Page 133: ...8 Timer Counters and Watchdog Timer...
Page 134: ......
Page 153: ...9 Programmable Counter Array...
Page 154: ......
Page 170: ......
Page 171: ...10 Serial I O Port...
Page 172: ......
Page 187: ...11 Minimum Hardware Setup...
Page 188: ......
Page 197: ...12 Special Operating Modes...
Page 198: ......
Page 206: ......
Page 207: ...13 External Memory Interface...
Page 208: ......
Page 239: ...14 Programming and Verifying Nonvolatile Memory...
Page 240: ......
Page 250: ......
Page 251: ...A Instruction Set Reference...
Page 252: ......
Page 390: ......
Page 391: ...B Signal Descriptions...
Page 392: ......
Page 400: ......
Page 401: ...C Registers...
Page 402: ......
Page 436: ......
Page 437: ...Glossary...
Page 438: ......
Page 446: ......
Page 447: ...Index...
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