8XC251SA, SB, SP, SQ USER’S MANUAL
2-4
The 8XC251Sx has two power-saving modes. In idle mode, the CPU clock is stopped, while
clocks to the peripherals continue to run. In powerdown mode, the on-chip oscillator is stopped,
and the chip enters a static state. An enabled interrupt or a hardware reset can bring the chip back
to its normal operating mode from idle or powerdown. See Chapter 12, “Special Operating
Modes,” for details on the power-saving modes.
MCS 251 microcontrollers use an instruction set that has been expanded to include new opera-
tions, addressing modes, and operands. Many instructions can operate on 8-, 16-, or 32-bit oper-
ands, providing easier and more efficient programming in high-level languages such as C.
Additional new features include the TRAP instruction, a new displacement addressing mode, and
several conditional jump instructions. Chapter 5, “Programming,” describes the instruction set
and compares it with the instruction set for MCS 51 microcontrollers.
You can configure the 8XC251Sx to run in binary mode or source mode. Either mode executes
all of the MCS 51 architecture instructions and all of the MCS 251 architecture instructions. How-
ever, source mode is more efficient for MCS 251 architecture instructions, and binary mode is
more efficient for MCS 51 architecture instructions. In binary mode, object code for an MCS 51
microcontroller runs on the 8XC251Sx without recompiling.
If a system was originally developed using an MCS 51 microcontroller, and if the new
8XC251Sx-based system will run code written for the MCS 51 microcontroller, performance will
be better with the 8XC251Sx running in binary mode. Object code written for the MCS 51 mi-
crocontroller runs faster on the 8XC251Sx.
However, if most of the code is rewritten using the new instruction set, performance will be better
with the 8XC251Sx running in source mode. In this case the 8XC251Sx can run significantly fast-
er than the MCS 51 microcontroller. See Chapter 4, “Device Configuration,” for a discussion of
binary mode and source mode.
MCS 251 microcontrollers store both code and data in a single, linear 16-Mbyte memory space.
The 8XC251Sx can address up to 256 Kbytes of external memory. The special function registers
(SFRs) and the register file have separate address spaces. See Chapter 3, “Address Spaces,” for a
description.
2.2
MCS 251 MICROCONTROLLER CORE
The MCS 251 microcontroller core contains the CPU, the clock and reset unit, the interrupt han-
dler, the bus interface, and the peripheral interface. The CPU contains the instruction sequencer,
ALU, register file, and data memory interface.
Summary of Contents for 8XC251SA
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Page 3: ...May 1996 8XC251SA 8XC251SB 8XC251SP 8XC251SQ Embedded Microcontroller User s Manual...
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Page 19: ...1 Guide to This Manual...
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Page 31: ...2 Architectural Overview...
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Page 41: ...3 Address Spaces...
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Page 63: ...4 Device Configuration...
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Page 81: ...5 Programming...
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Page 103: ...6 Interrupt System...
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Page 121: ...7 Input Output Ports...
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Page 133: ...8 Timer Counters and Watchdog Timer...
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Page 153: ...9 Programmable Counter Array...
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Page 171: ...10 Serial I O Port...
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Page 187: ...11 Minimum Hardware Setup...
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Page 197: ...12 Special Operating Modes...
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Page 207: ...13 External Memory Interface...
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Page 239: ...14 Programming and Verifying Nonvolatile Memory...
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Page 251: ...A Instruction Set Reference...
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Page 391: ...B Signal Descriptions...
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Page 401: ...C Registers...
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Page 437: ...Glossary...
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Page 447: ...Index...
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