Intel 8XC251SA, User Manual

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A-51
INSTRUCTION SET REFERENCE
Operation: CPL
(CY)
←
Ø(CY)
CPL bit
Binary Mode Source Mode
Bytes: 4 3
States: 4† 3†
†If this instruction addresses a port (P x , x = 0–3), add 2 states.
[Encoding]
Hex Code in: Binary Mode = [A5][Encoding]
Source Mode = [Encoding]
Operation: CPL
(bit)
←
Ø(bit)
DA A
Function: Decimal-adjust accumulator for addition
Description: Adjusts the 8-bit value in the accumulator that resulted from the earlier addition of two
variables (each in packed-BCD format), producing two 4-bit digits. Any ADD or ADDC
instruction may have been used to perform the addition.
If accumulator bits 3:0 are greater than nine (XXXX1010–XXXX1111), or if the AC flag is set,
six is added to the accumulator, producing the proper BCD digit in the low nibble. This
internal addition sets the CY flag if a carry out of the lowest 4 bits propagated through all
higher bits, but it does not clear the CY flag otherwise.
If the CY flag is now set, or if the upper four bits now exceed nine (1010XXXX–1111XXXX),
these four bits are incremented by six, producing the proper BCD digit in the high nibble.
Again, this sets the CY flag if there was a carry out of the upper four bits, but does not clear
the carry. The CY flag thus indicates if the sum of the original two BCD variables is greater
than 100, allowing multiple-precision decimal addition. The OV flag is not affected.
All of this occurs during one instruction cycle. Essentially, this instruction performs the
decimal conversion by adding 00H, 06H, 60H, or 66H to the accumulator, depending on
initial accumulator and PSW conditions.
Note: DA A cannot simply convert a hexadecimal number in the accumulator to BCD
notation, nor does DA A apply to decimal subtraction.
Flags:
1 0 1 0 1 0 0 1 1 0 1 1 0 y y y dir addr
CY AC OV N Z
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