Intel 8XC251SA, User Manual

Page: 308 / 458

8XC251SA, SB, SP, SQ USER’S MANUAL
A-56
Variations
DIV Rmd Rms
Binary Mode Source Mode
Bytes: 3 2
States: 11 10
Hex Code in: Binary Mode = [A5][Encoding]
Source Mode = [Encoding]
Operation: DIV (8-bit operands)
(Rmd)
←
remainder (Rmd) / (Rms) if <dest> md = 0,2,4,..,14
(Rmd+1)
←
quotient (Rmd) / (Rms)
(Rmd–1)
←
remainder (Rmd) / (Rms) if <dest> md = 1,3,5,..,15
(Rmd)
←
quotient (Rmd) / (Rms)
DIV WRjd,WRjs
Binary Mode Source Mode
Bytes: 3 2
States: 22 21
Hex Code in: Binary Mode = [A5][Encoding]
Source Mode = [Encoding]
Operation: DIV (16-bit operands)
(WRjd)
←
remainder (WRjd) / (WRjs) if <dest> jd = 0, 4, 8, ... 28
(WRjd+2)
←
quotient (WRjd) / (WRjs)
(WRjd–2)
←
remainder (WRjd) / (WRjs) if <dest> jd = 2, 6, 10, ... 30
(WRjd)
←
quotient (WRjd) / (WRjs)
For word operands (<dest>,<src> = WRjd,WRjs) the 16-bit quotient is in WR(jd+2), and the
16-bit remainder is in WRjd. For example, for a destination register WR4, assume the
quotient is 1122H and the remainder is 3344H. Then, the results are stored in these register
file locations:
DIV AB
Function: Divide
Description: Divides the unsigned 8-bit integer in the accumulator by the unsigned 8-bit integer in register
B. The accumulator receives the integer part of the quotient; register B receives the integer
remainder. The CY and OV flags are cleared.
[Encoding] 1 0 0 0 1 1 0 0 s s s s S S S S
[Encoding] 1 0 0 0 1 1 0 1 t t t t T T T T
Location 4 5 6 7
Contents 33H 44H 11H 22H