Intel 8XC251SA, User Manual

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8XC251SA, SB, SP, SQ USER’S MANUAL
Glossary-2
big endien form Memory storage format in which the most significant
byte (MSB) of the word or double word is stored in
the memory byte specified in the instruction. The
remaining bytes are stored at higher addresses, with
the least significant byte (LSB) at the highest address.
binary-code compatibility The ability of an MCS
®
251 microcontroller to
execute, without modification, binary code written for
an MCS 51 microcontroller.
binary mode An operating mode, selected by a configuration bit,
that enables an MCS 251 microcontroller to execute,
without modification, binary code written for an MCS
51 microcontroller.
bit A binary digit.
bit (operand) An addressable bit in the MCS 251 architecture.
bit51 An addressable bit in the MCS 51 architecture.
byte Any 8-bit unit of data.
clear The term clear refers to the value of a bit or the act of
giving it a value. If a bit is clear, its value is “0”;
clearing a bit gives it a “0” value.
code memory See program memory.
configuration bytes Bytes, residing in on-chip OTPROM/ROM, that
determine a set of operating parameters for the
8XC251SB.
dir8 An 8-bit direct address. This can be a memory address
or an SFR address.
dir16 A 16-bit memory address (00:0000H–00:FFFFH)
used in direct addressing.
DPTR The 16-bit data pointer. In MCS 251 microcontrollers,
DPTR is the lower 16 bits of the 24-bit extended data
pointer, DPX.
DPX The 24-bit extended data pointer in MCS 251 micro-
controllers. See also DPTR.