A-103
INSTRUCTION SET REFERENCE
NOP
Function:
No operation
Description:
Execution continues at the following instruction. Affects the PC register only.
Flags:
Example:
You want to produce a low-going output pulse on bit 7 of Port 2 that lasts exactly 11 states. A
simple CLR-SETB sequence generates an eight-state pulse. (Each instruction requires four
states to write to a port SFR.) You can insert three additional states (if no interrupts are
enabled) with the following instruction sequence:
CLR
P2.7
NOP
NOP
NOP
SETB P2.7
Binary Mode
Source Mode
Bytes:
1
1
States:
1
1
Hex Code in:
Binary Mode = [Encoding]
Source Mode = [Encoding]
Operation:
NOP
(PC)
←
(PC) + 1
ORL <dest> <src>
Function:
Logical-OR for byte variables
Description:
Performs the bitwise logical-OR operation (V) between the specified variables, storing the
results in the destination operand.
The destination operand can be a register, an accumulator or direct address.
The two operands allow twelve addressing mode combinations. When the destination is the
accumulator, the source can be register, direct, register-indirect, or immediate addressing;
when the destination is a direct address, the source can be the accumulator or immediate
data. When the destination is register the source can be register, immediate, direct and
indirect addressing.
Note: When this instruction is used to modify an output port, the value used as the original
port data is read from the output data latch, not the input pins.
Flags:
CY
AC
OV
N
Z
—
—
—
—
—
[Encoding]
0 0 0 0
0 0 0 0
CY
AC
OV
N
Z
—
—
—
✓
✓
Summary of Contents for 8XC251SA
Page 2: ......
Page 3: ...May 1996 8XC251SA 8XC251SB 8XC251SP 8XC251SQ Embedded Microcontroller User s Manual...
Page 18: ......
Page 19: ...1 Guide to This Manual...
Page 20: ......
Page 30: ......
Page 31: ...2 Architectural Overview...
Page 32: ......
Page 41: ...3 Address Spaces...
Page 42: ......
Page 63: ...4 Device Configuration...
Page 64: ......
Page 81: ...5 Programming...
Page 82: ......
Page 102: ......
Page 103: ...6 Interrupt System...
Page 104: ......
Page 120: ......
Page 121: ...7 Input Output Ports...
Page 122: ......
Page 132: ......
Page 133: ...8 Timer Counters and Watchdog Timer...
Page 134: ......
Page 153: ...9 Programmable Counter Array...
Page 154: ......
Page 170: ......
Page 171: ...10 Serial I O Port...
Page 172: ......
Page 187: ...11 Minimum Hardware Setup...
Page 188: ......
Page 197: ...12 Special Operating Modes...
Page 198: ......
Page 206: ......
Page 207: ...13 External Memory Interface...
Page 208: ......
Page 239: ...14 Programming and Verifying Nonvolatile Memory...
Page 240: ......
Page 250: ......
Page 251: ...A Instruction Set Reference...
Page 252: ......
Page 390: ......
Page 391: ...B Signal Descriptions...
Page 392: ......
Page 400: ......
Page 401: ...C Registers...
Page 402: ......
Page 436: ......
Page 437: ...Glossary...
Page 438: ......
Page 446: ......
Page 447: ...Index...
Page 448: ......
Page 458: ......