8XC251SA, SB, SP, SQ USER’S MANUAL
A-14
A.3.2
Instruction Summaries
Table A-19. Summary of Add and Subtract Instructions
Add
ADD <dest>,<src>
dest opnd
←
dest opnd + src opnd
Subtract
SUB <dest>,<src>
dest opnd
←
dest opnd - src opnd
Add with Carry
ADDC <dest>,<src>
(A)
←
(A) + src opnd + carry bit
Subtract with Borrow
SUBB <dest>,<src>
(A)
←
(A) - src opnd - carry bit
Mnemonic
<dest>,<src>
Notes
Binary Mode
Source Mode
Bytes
States
Bytes
States
ADD
A,Rn
Reg to acc
1
1
2
2
A,dir8
Dir byte to acc
2
2
A,@Ri
Indir addr to acc
1
2
2
3
A,#data
Immediate data to acc
2
1
2
1
ADD;
SUB
Rmd,Rms
Byte reg to/from byte reg
3
2
2
1
WRjd,WRjs
Word reg to/from word reg
3
3
2
2
DRkd,DRks
Dword reg to/from dword reg
3
5
2
4
Rm,#data
Immediate 8-bit data to/from byte reg
4
3
3
2
WRj,#data16
Immediate 16-bit data to/from word reg
5
4
4
3
DRk,#0data16
16-bit unsigned immediate data to/from
dword reg
5
6
4
5
Rm,dir8
Dir addr to/from byte reg
4
3 (2)
3
WRj,dir8
Dir addr to/from word reg
4
4
3
3
Rm,dir16
Dir addr (64K) to/from byte reg
5
3
4
2
WRj,dir16
Dir addr (64K) to/from word reg
5
4
4
3
Rm,@WRj
Indir addr (64K) to/from byte reg
4
3
3
2
Rm,@DRk
Indir addr (16M) to/from byte reg
4
4
3
3
ADDC;
SUBB
A,Rn
Reg to/from acc with carry
1
1
2
2
A,dir8
Dir byte to/from acc with carry
2
1 (2)
2
1 (2)
A,@Ri
Indir RAM to/from acc with carry
1
2
2
3
A,#data
Immediate data to/from acc with carry
2
1
2
1
NOTES:
1.
A shaded cell denotes an instruction in the MCS
®
51 architecture.
2.
If this instruction addresses an I/O port (P
x
,
x
= 3:0), add 1 to the number of states.
Summary of Contents for 8XC251SA
Page 2: ......
Page 3: ...May 1996 8XC251SA 8XC251SB 8XC251SP 8XC251SQ Embedded Microcontroller User s Manual...
Page 18: ......
Page 19: ...1 Guide to This Manual...
Page 20: ......
Page 30: ......
Page 31: ...2 Architectural Overview...
Page 32: ......
Page 41: ...3 Address Spaces...
Page 42: ......
Page 63: ...4 Device Configuration...
Page 64: ......
Page 81: ...5 Programming...
Page 82: ......
Page 102: ......
Page 103: ...6 Interrupt System...
Page 104: ......
Page 120: ......
Page 121: ...7 Input Output Ports...
Page 122: ......
Page 132: ......
Page 133: ...8 Timer Counters and Watchdog Timer...
Page 134: ......
Page 153: ...9 Programmable Counter Array...
Page 154: ......
Page 170: ......
Page 171: ...10 Serial I O Port...
Page 172: ......
Page 187: ...11 Minimum Hardware Setup...
Page 188: ......
Page 197: ...12 Special Operating Modes...
Page 198: ......
Page 206: ......
Page 207: ...13 External Memory Interface...
Page 208: ......
Page 239: ...14 Programming and Verifying Nonvolatile Memory...
Page 240: ......
Page 250: ......
Page 251: ...A Instruction Set Reference...
Page 252: ......
Page 390: ......
Page 391: ...B Signal Descriptions...
Page 392: ......
Page 400: ......
Page 401: ...C Registers...
Page 402: ......
Page 436: ......
Page 437: ...Glossary...
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Page 446: ......
Page 447: ...Index...
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