Intel 8XC251SA, User Manual

Page: 57 / 458

3-15
ADDRESS SPACES
3.3.2.2 Extended Data Pointer, DPX
Dword register DR56 is the extended data pointer, DPX (Figure 3-8). The lower three bytes of
DPX (DPL, DPH, and DPXL) are accessible as SFRs. DPL and DPH comprise the 16-bit data
pointer DPTR. While instructions in the MCS 51 architecture always use DPTR as the data point-
er, instructions in the MCS 251 architecture can use any word or dword register as a data pointer.
DPXL, the byte in location 57, specifies the region of memory (00:–FF:) that maps into the 64-
Kbyte external data memory space in the MCS 51 architecture. In other words, the MOVX in-
struction addresses the region specified by DPXL when it moves data to and from external mem-
ory. The reset value of DPXL is 01H.
3.3.2.3 Extended Stack Pointer, SPX
Dword register DR60 is the stack pointer, SPX (Figure 3-8). The byte at location 63 is the 8-bit
stack pointer, SP, in the MCS 51 architecture. The byte at location 62 is the stack pointer high,
SPH. The two bytes allow the stack to extend to the top of memory region 00:. SP and SPH can
be accessed as SFRs.
Two instructions, PUSH and POP directly address the stack pointer. Subroutine calls (ACALL,
ECALL, LCALL) and returns (ERET, RET, RETI) also use the stack pointer. To preserve the
stack, do not use DR60 as a general-purpose register.
Table 3-4. Dedicated Registers in the Register File and their Corresponding SFRs
Register File SFRs
Name Mnemonic Reg. Location Mnemonic Address
Stack
Pointer
(SPX)
— —
DR60
60 — —
— — 61 — —
Stack Pointer, High SPH 62 SPH S:BEH
Stack Pointer, Low SP 63 SP S:81H
Data
Pointer
(DPX)
— —
DR56
56 — —
Data Pointer, Extended Low DPXL 57 DPXL S:84H
DPTR
Data Pointer, High DPH 58 DPH S:83H
Data Pointer, Low DPL 59 DPL S:82H
Accumulator (A Register) A R11 11 ACC S:E0H
B Register B R10 10 B S:F0H
i_mempar.fm5 Page 15 Thursday, June 27, 1996 2:06 PM