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HARRIS
888-9058-001
WARNING: Disconnect and lockout AC primary power prior to servicing
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R3 and R4 shunt load the highly capacitive gate input impedance of the FETs. C2
completes the input impedance transformation. An adjustable voltage divider feeds bias
voltages to the gates of the RF FETs, controlling their quiescent drain currents.
Series inductors feed 50 Volts to the FET drains, and act as RF chokes, blocking the RF
from appearing on the power supply lines.
The sliding short sections form small inductances. Together with C4/C5/C37 they form
a balanced L-net, which provides both a low-pass response and an impedance step-up
transformation between the FET drains and the input of T3.
T3 is a coaxial balun, fabricated from semi-rigid coax. It adds the output voltages of Q1
and Q2 in series, and continues the output impedance transformation. Its outer
conductor is grounded by C13, and the RF output is coupled through C15.
The outputs of the two amplifier halves are recombined by a two-way Wilkinson
combiner, composed of two 75 ohm microstrip sections.
If any phase or amplitude difference exists between the signal in the upper and lower
amplifier halves, an RF voltage develop across R11 and L9. L9 is the primary of a
toroidal transformer, whose secondary is L10. Any RF voltage will be coupled through
the toroidal transformer to R12/CR1/C33 an RF peak detector which produces a DC
signal proportional to the amount of imbalance. This signal is called the ISO voltage
sample, and it is sent to the PCM system through J1-2.
8.2.7 Quarter Module Bias
The +15 Volts for the FET bias voltage divider is furnished by a step-down regulator in
the Protection, Monitoring and Control Subsystem. This regulated voltage switches
with the switched 50 Volts.
Thermistor R1 is mounted to the heat sink between RF FETS Q2 and Q3 and completes
a resistive voltage divider between the +15 Volts and ground. As the heatsink
temperature increases the resistance of the thermistor decreases.
The change in thermistor resistance changes the voltage reference for the bias
adjustment. This change in reference tracks the change in bias current with temperature.
This proportional voltage is divided down by the four bias adjust controls R24, R25,
R26 and R27 for precise adjustment of the static current of the individual RF FETS.
The reference voltage is also monitored by the module control board, excessive heat
sink temperature will result in a temperature fault. R2(HB)or R16(LB) is used for
temperature calibration. The voltage is factory adjusted for 5.30 Volts when the heatsink
temperature is 25
0
C. Any adjustment of R2 or R16 will affect the FET static current bias
settings.