GD32VF103 User Manual
76
1: Enable the PLL2 stabilization interrupt
13
PLL1STBIE
PLL1 Stabilization Interrupt Enable
Set and reset by software to enable/disable the PLL1 stabilization interrupt.
0: Disable the PLL1 stabilization interrupt
1: Enable the PLL1 stabilization interrupt
12
PLLSTBIE
PLL Stabilization Interrupt Enable
Set and reset by software to enable/disable the PLL stabilization interrupt.
0: Disable the PLL stabilization interrupt
1: Enable the PLL stabilization interrupt
11
HXTALSTBIE
HXTAL Stabilization Interrupt Enable
Set and reset by software to enable/disable the HXTAL stabilization interrupt
0: Disable the HXTAL stabilization interrupt
1: Enable the HXTAL stabilization interrupt
10
IRC8MSTBIE
IRC8M Stabilization Interrupt Enable
Set and reset by software to enable/disable the IRC8M stabilization interrupt
0: Disable the IRC8M stabilization interrupt
1: Enable the IRC8M stabilization interrupt
9
LXTALSTBIE
LXTAL Stabilization Interrupt Enable
LXTAL stabilization interrupt enable/disable control
0: Disable the LXTAL stabilization interrupt
1: Enable the LXTAL stabilization interrupt
8
IRC40KSTBIE
IRC40K Stabilization interrupt enable
IRC40K stabilization interrupt enable/disable control
0: Disable the IRC40K stabilization interrupt
1: Enable the IRC40K stabilization interrupt
7
CKMIF
HXTAL Clock Stuck Interrupt Flag
Set by hardware when the HXTAL clock is stuck.
Reset when setting the CKMIC bit by software.
0: Clock operating normally
1: HXTAL clock stuck
6
PLL2STBIF
PLL2 stabilization interrupt flag
Set by hardware when the PLL2 is stable and the PLL2STBIE bit is set.
Reset when setting the PLL2STBIC bit by software.
0: No PLL2 stabilization interrupt generated
1: PLL2 stabilization interrupt generated
5
PLL1STBIF
PLL1 stabilization interrupt flag
Set by hardware when the PLL1 is stable and the PLL1STBIE bit is set.
Reset when setting the PLL1STBIC bit by software.
0: No PLL1 stabilization interrupt generated