GD32VF103 User Manual
528
The setting of SNAK bit in USBFS_DIEPxCTL register takes effect. This bit can be
cleared either by writing 1 to it or by setting CNAK bit in USBFS_DIEPxCTL register.
5
Reserved
Must be kept at reset value
4
EPTXFUD
Endpoint Tx FIFO underrun
This flag is triggered if the Tx FIFO has no packet data when an IN token is incoming
3
CITO
Control In Timeout interrupt
This flag is triggered if the device waiting for a handshake is timeout in a control IN
transaction.
2
Reserved
Must be kept at reset value
1
EPDIS
Endpoint disabled
This flag is triggered when an endpoint is disabled by the software
’s request.
0
TF
Transfer finished
This flag is triggered when all the IN transactions assigned to this endpoint have
been finished.
Device OUT endpoint-x interrupt flag register (USBFS_DOEPxINTF) (x = 0..3,
where x = endpoint_number)
Address offset: (endpoint_number × 0x20)
Reset value: 0x0000 0000
This register contains the status and events of an OUT endpoint, when an OUT endpoint
interrupt occurs, read this register for the respective endpoint to know the source of the
interrupt. The flag bits in this register are all set by hardware and cleared by writing 1.
This register has to be accessed by word (32-bit)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Rese
rve
d
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Rese
rve
d
B
T
B
S
T
P
Rese
rve
d
E
P
RX
F
OV
R
S
T
P
F
Rese
rve
d
E
P
DIS
TF
rc_w1/rw
rc_w1
rc_w1
rc_w1
rc_w1
Bits
Fields
Descriptions
31:7
Reserved
Must be kept at reset value