MEMORY MODULES AND OPERATING MODES
MOTOROLA
MEMORY MODULES AND OPERATING MODES
3 - 3
3.1
MEMORY MODULES AND OPERATING MODES
The memory of the DSP56002 can be partitioned in several ways to provide high-speed
parallel operation and additional off-chip memory expansion. Program and data memory
are separate, and the data memory is, in turn, divided into two separate memory spaces,
X and Y. Both the program and data memories can be expanded off-chip. There are also
two on-chip data read-only memories (ROMs) that can overlay a portion of the X and Y
data memories, and a bootstrap ROM that can overlay part of the program random-ac-
cess memory (RAM). The data memories are divided into two independent spaces to work
with the two address arithmetic logic units (ALUs) to feed two operands simultaneously to
the data ALU.
The DSP operating modes determine the memory maps for program and data memories
and the start-up procedure when the DSP leaves the reset state. This section describes
the DSP56002 Operating Mode Register (OMR), its operating modes and their associated
memory maps, and discusses how to set and reset operating modes.
This section also includes details of the interrupt vectors and priorities and describes the
effect of a hardware reset on the PLL multiplication factor.
3.2
DSP56002 DATA AND PROGRAM MEMORY
The DSP56002 has 512 words of program RAM, 64 words of bootstrap ROM, 256 words
of RAM and 256 words of ROM for each of the X and Y internal data memories. The mem-
ory maps are shown in Section Figure 3-1 DSP56002 Memory Maps.
3.2.1
Program Memory
The DSP56002 has 512 words of program RAM and 64 words of factory-programmed
bootstrap ROM.
The bootstrap ROM is programmed to perform the bootstrap operation from the memory
expansion port (port A), from the host interface, or from the SCI. It provides a convenient,
low cost method of loading the program RAM with a user program after power-on reset.
The bootstrap ROM activity is controlled by the MA, MB, and MC bits in the OMR (see
DSP56002 OPERATING MODE REGISTER (OMR)
for a complete explanation of the
OMR and the DSP56002’s operating modes and memory maps).
Addresses are received from the program control logic (usually the program counter) over
the PAB. Program memory may be written using the program memory (MOVEM) instruc-
tions. The interrupt vectors are located in the bottom 128 locations ($0000-$007F) of
program memory. Program memory may be expanded to 64K off-chip.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
..
