TIMER COUNT REGISTER (TCR)
7 - 4
DSP56002 TIMER AND EVENT COUNTER
MOTOROLA
The DSP56002 views the timer as a memory-mapped peripheral occupying two 24-bit
words in the X data memory space, and may use it as a normal memory-mapped periph-
eral by using standard polled or interrupt programming techniques.The programming
model is shown in Figure 7-2.
7.3
TIMER COUNT REGISTER (TCR)
The 24-bit read-write TCR contains the value (specified by the user program) to be loaded
into the counter when the timer is enabled (TE=1), or when the counter has been decre-
mented to zero and a new event occurs. If the TCR is loaded with n, the counter will be
reloaded after (n+1) events.
If the timer is disabled (TE=0) and the user program writes to the TCR, the value is stored
there but will not be loaded into the counter until the timer becomes enabled. When the
timer is enabled (TE=1) and the user program writes to the TCR, the value is stored there
and will be loaded into the counter after the counter has been decremented to zero and a
new event occurs.
In Timer Modes 4 and 5, however, the TCR will be loaded with the current value of the
counter on the appropriate edge of the TIO input signal (rather than with a value specified
by the user program). The value loaded to the TCR represents the width or the period of
*
DO DI DIR TS G
PI
O TC2 TC1 TC0 INV TIE TE
0
TIMER CONTROL/STATUS REGISTER (TCSR)
ADDRESS X:$FFDE
*
- reserved, read as zero, should be written with zero for future compatibility
23
0
READ/WRITE
TIMER COUNT REGISTER (TCR)
ADDRESS X:$FFDF
23
Figure 7-2 Timer/Event Counter Programming Model
*
*
*
*
*
*
*
*
*
*
*
*
(0)
(0)
(0)
(0) (0)
(0) (0)
(0) (0)
(0) (1)
READ/WRITE
TIMER ENABLE
TIMER INTERRUPT ENABLE
INVERTER
TIMER CONTROL BITS
GENERAL PURPOSE I0
TIMER STATUS
DIRECTION BIT
DATA INPUT
DATA OUTPUT
RESERVED
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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