4
DSP56002 User’s Manual Addendum
MOTOROLA
CENTRAL PROCESSOR
HPL1
HPL0
Enab
led
IPL
0
0
No
—
0
1
Yes
0
1
0
Yes
1
1
1
Yes
2
*
= Reserved, Program as zero
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
SCL0
HPL1
HPL0
IBL2
IBL1
IBL0
IAL2
IAL1
IAL0
Interrupt Priority
X:$FFFF Read/Write
SSL1
SSL0
IRQA
Mode
IAL2
T
rig
g
er
IAL1
IAL0
Enab
led
IPL
0
Level
0
0
No
—
1
Neg. Edge
0
1
Yes
0
1
0
Yes
1
1
1
Yes
2
Reset = $000000
Register (IPR)
23
22
21
20
19
18
16
17
*
0
*
0
*
0
*
0
*
0
*
0
*
0
*
0
*
0
*
0
SSL1
SSL0
Enab
led
IPL
0
0
No
—
0
1
Yes
0
1
0
Yes
1
1
1
Yes
2
SCL1
SCL0
Enab
led
IPL
0
0
No
—
0
1
Yes
0
1
0
Yes
1
1
1
Yes
2
SCL1
Host IPL
SCI IPL
SSI IPL
IRQB
Mode
IBL2
T
rig
g
er
IBL1
IBL0
Enab
led
IPL
0
Level
0
0
No
—
1
Neg. Edge
0
1
Yes
0
1
0
Yes
1
1
1
Yes
2
$0
Figure B-4 Interrupt Priority Register (IPR)
TIL1
TIL0
Enab
led
IPL
0
0
No
—
0
1
Yes
0
1
0
Yes
1
1
1
Yes
2
TIMER IPL
TIL1
TIL0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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