MOTOROLA
B - 27
Application:
Date:
Sheet 1 of 1
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
•
•
•
23
*
0
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
•
•
•
23
*
0
Timer Control and
Status Register (TCSR)
X:$FFDE (Read/Write)
Reset = $000200
Timer Count Register (TCR)
X:$FFDF (Read/Write)
Unaffected by Reset
TE
TIE
INV
TC0
TC1
TC2
GPIO
TS
DIR
DI
DO
*
0
*
0
*
0
*
0
*
0
*
= Reserved, Program as zero
Timer Enable Bit 0
0 = Timer Disabled
1 = Timer Enabled
Timer Interrupt Enable Bit 1
0 = Interrupts Disabled
1 = Interrupts Enabled
Inverter Bit 2
0 = 0- to-1 transitions on TIO
input decrement the counter
1 = 1-to-0 transitions on TIO
input decrement the counter
or
Timer pulse inverted before
it goes to TIO output
GPIO Bit 6
0 = TIO is Timer IO
1 = TIO is GPIO if TC2-TC0 are clear
Timer Control Bits 3-5 (TC0 - TC2)
TC2
TC1
TC0
TIO
Clock
Mode
0
0 0
GPIO
Internal
Timer
0
0
1
Output
Internal
Timer Pulse
0
1
0
Output
Internal
Timer Toggle
0
1
1
X
X
Undefined
1
0
0
Input
Internal
Input Width
1
0
1
Input
Internal
Input Period
1
1
0
Input
External
Standard Time Counter
1
1
1
Input
External
Event Counter
Timer Status Bit 7
0 = TCSR read, or timer interrupt
serviced
1 = Counter decremented to 0
Direction Bit 8
0 = TIO pin is input
1 = TIO pin is output
Data Output Bit 10
0 =Zero written to TIO pin
1 = One written to TIO pin
Data Input Bit 9
0 = Zero read on TIO pin
1 = One read on TIO pin
*
= Reserved, Program as zero
Figure B-34 Timer Control and Status Register (TCSR)
Figure B-35 Timer Count Register (TCR)
TIMER
Note: The first version of the DSP56002 (mask number D41G) did not have the timer/
event counter. Later versions of the DSP56002 which have different mask numbers
do have the timer/event counter. This mask number can be found below the part
number on each chip.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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