Atmel XMEGA B, User Manual

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192 XMEGA B [DATASHEET]
8291B–AVR–01/2013
Figure 15-5. Pattern generator block diagram.
As with the other timer/counter double buffered registers, the register update is synchronized to the UPDATE condition
set by the waveform generation mode. If the synchronization provided is not required by the application, the application
code can simply access the DTIOE and PORTx registers directly.
The pin directions must be set for any output from the pattern generator to be visible on the port.
15.6 Fault Protection
The fault protection feature enables fast and deterministic action when a fault is detected. The fault protection is event
controlled. Thus, any event from the event system can be used to trigger a fault action, such as over-current indication
from analog comparator or ADC measurements.
When fault protection is enabled, an incoming event from any of the selected event channels can trigger the event action.
Each event channel can be separately enabled as a fault protection input, and the specified event channels will be ORed
together, allowing multiple event sources to be used for fault protection at the same time.
15.6.1 Fault Actions
When a fault is detected, the direction clear action will clear the direction (DIR) register in the associated port, setting all
port pins as tri-stated inputs.
The fault detection flag is set, the timer/counter’s error interrupt flag is set, and the optional interrupt is generated.
There is maximum of two peripheral clock cycles from when an event occurs in a peripheral until the fault protection
triggers the event action. Fault protection is fully independent of the CPU and DMA, but requires the peripheral clock to
run.
15.6.2 Fault Restore Modes
How the AWeX and timer/counter return from the fault state to normal operation after a fault, when the fault condition is
no longer active, can be selected from one of two different modes:

In latched mode, the waveform output will remain in the fault state until the fault condition is no longer active and
the fault detect flag has been cleared by software. When both of these conditions are met, the waveform output will
return to normal operation at the next UPDATE condition.

In cycle-by-cycle mode the waveform output will remain in the fault state until the fault condition is no longer active.
When this condition is met, the waveform output will return to normal operation at the next UPDATE condition.
Timer/Counter 0 (TCx0)
BV BV DTLSBUF
OUTOVEN
DTHSBUF
OUTx
CCA WG output UPDATE
EN EN
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