Atmel XMEGA B, User Manual

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193 XMEGA B [DATASHEET]
8291B–AVR–01/2013
When returning from a fault state the DIR[7:0] bits corresponding to the enabled DTI channels are restored. OUTOVEN is
unaffected by the fault except that writing to the register from software is blocked.
The UPDATE condition used to restore normal operation is the same as the one in the timer/counter.
15.6.3 Change Protection
To avoid unintentional changes in the fault protection setup, all the control registers in the AWeX extension can be
protected by writing the corresponding lock bit in the advanced waveform extension lock register. For more details, refer
to
“I/O Memory Protection” on page 25 and “AWEXLOCK – Advanced Waveform Extension Lock register” on page 44 .
When the lock bit is set, control register A, the output override enable register, and the fault detection event mask register
cannot be changed.
To avoid unintentional changes in the fault event setup, it is possible to lock the event system channel configuration by
writing the corresponding event system lock register. For more details, refer to
“I/O Memory Protection” on page 25 and
“EVSYSLOCK – Event System Lock register” on page 43 .
15.6.4 On-Chip Debug
When fault detection is enabled, an on-chip debug (OCD) system receives a break request from the debugger, which will
by default function as a fault source. When an OCD break request is received, the AWeX and corresponding
timer/counter will enter a fault state, and the specified fault action will be performed.
After the OCD exits from the break condition, normal operation will be started again. In cycle-by-cycle mode, the
waveform output will start on the first UPDATE condition after exit from break, while in latched mode, the fault condition
flag must be cleared in software before the output will be restored. This feature guarantees that the output waveform
enters a safe state during a break.
It is possible to disable this feature.