Atmel XMEGA B, User Manual

Page: 30 / 415

30 XMEGA B [DATASHEET]
8291B–AVR–01/2013
4.14.12 LOCKBITS – Lock Bits register
This register is a mapping of the NVM lock bits into the I/O memory space, which enables direct read access from the
application software. Refer to
“LOCKBITS – Lock Bits register” on page 34 for a description.
4.15 Register Descriptions – Fuses and Lock Bits
4.15.1 FUSEBYTE0 – Fuse Byte 0

Bit 7 – JTAGUID[7:0]: JTAG USER ID
These fuses can be used to set the default JTAG user ID for the device. During reset, the JTAGUID fuse bits will be
loaded into the MCU JTAG user ID register.
4.15.2 FUSEBYTE1 – Fuse Byte1

Bit 7:4 – WDWPER[3:0]: Watchdog Window Timeout Period
These fuse bits are used to set initial value of the closed window for the Watchdog Timer in Window Mode. During reset
these fuse bits are automatically written to the WPER bits Watchdog Window Mode Control Register, refer to
“WINCTRL
– Window Mode Control register” on page 118 for details.

Bit 3:0 – WDPER[3:0]: Watchdog Timeout Period
These fuse bits are used to set the initial value of the watchdog timeout period. During reset, these fuse bits are
automatically written to the PER bits in the watchdog control register. .RRefer to
“CTRL – Control register” on page 117
for details.
Bit 7 6 5 4 3 2 1 0
+0x07
BLBB[1:0] BLBA[1:0] BLBAT[1:0] LB[1:0]
Read/Write R R R R R R R R
Initial Value 1 1 1 1 1 1 1 1
Bit 7 6 5 4 3 2 1 0
+0x00
JTAGUID[7:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
+0x01
WDWPER[3:0] WDPER[3:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0