180
XMEGA B [DATASHEET]
8291B–AVR–01/2013
Figure 14-6. Port override for low- and high-byte timer/counters.
14.7
Interrupts and Events
The timer/counters can generate interrupts and events. The counter can generate an interrupt on underflow, and each
CMP channel for the low-byte counter has a separate compare interrupt.
Events will be generated for all conditions that can generate interrupts. For details on event generation and available
events, refer to
14.8
DMA Support
Timer/counter underflow and compare interrupt flags can trigger a DMA transaction. The acknowledge condition that
clears the flag/request is listed in
Table 14-1. DMA request sources.
14.9
Timer/Counter Commands
A set of commands can be given to the timer/counter by software to immediately change the state of the module. These
commands give direct control of the update, restart, and reset signals.
The software can force a restart of the current waveform period by issuing a restart command. In this case the counter,
direction, and all compare outputs are set to zero.
A reset command will set all timer/counter registers to their initial values. A reset can only be given when the
timer/counter is not running (OFF).
OUT
LCMPENx /
HCMPENx
INVEN
OCx
Waveform
Request
Acknowledge
Comment
LUNFIF
DMAC writes to LCNT
DMAC writes to LPER
HUNFIF
DMAC writes to HCNT
DMAC writes to HPER
CCIF{D,C,B,A}
DMAC access of
LCMP{D,C,B,A}
Output compare operation
Summary of Contents for XMEGA B
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Page 322: ...322 XMEGA B DATASHEET 8291B AVR 01 2013 Table 25 14 16 segments Character Table...
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