287
XMEGA B [DATASHEET]
8291B–AVR–01/2013
22.3
Registers Description
22.3.1 TXPLCTRL – Transmitter Pulse Length Control Register
Bit 7:0 – TXPLCTRL[7:0]: Transmitter Pulse Length Control
This 8-bit value sets the pulse modulation scheme for the transmitter. Setting this register will have no effect if IRCOM
mode is not selected by a USART.
By leaving this register value to zero, 3/16 of the baud rate period pulse modulation is used.
Setting this value from 1 to 254 will give a fixed pulse length coding. The 8-bit value sets the number of system clock
periods for the pulse. The start of the pulse will be synchronized with the rising edge of the baud rate clock.
Setting the value to 255 (0xFF) will disable pulse coding, letting the RX and TX signals pass through the IRCOM module
unaltered. This enables other features through the IRCOM module, such as half-duplex USART, loop-back testing, and
USART RX input from an event channel.
TXPCTRL must be configured before the USART transmitter is enabled (TXEN).
22.3.2 RXPLCTRL – Receiver Pulse Length Control Register
Bit 7:0 – RXPLCTRL[7:0]: Receiver Pulse Length Control
This 8-bit value sets the filter coefficient for the IRCOM transceiver. Setting this register will have no effect if IRCOM
mode is not selected by a USART.
By leaving this register value at zero, filtering is disabled. Setting this value between 1 and 255 will enable filtering, where
x+1 equal samples are required for the pulse to be accepted.
RXPCTRL must be configured before the USART receiver is enabled (RXEN).
22.3.3 CTRL – Control Register
Bit 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero
when this register is written.
Bit 3:0 – EVSEL [3:0]: Event Channel Selection
These bits select the event channel source for the IRCOM receiver according to
. If event input is selected for
the IRCOM receiver, the input from the USART’s RX pin is automatically disabled.
Bit
7
6
5
4
3
2
1
0
TXPLCTRL[7:0]
Read/Write R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
RXPLCTRL[7:0]
Read/Write R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
–
–
–
–
EVSEL[3:0]
Read/Write R
R
R
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Summary of Contents for XMEGA B
Page 320: ...320 XMEGA B DATASHEET 8291B AVR 01 2013 Table 25 12 7 segments Character Table...
Page 321: ...321 XMEGA B DATASHEET 8291B AVR 01 2013 Table 25 13 14 segments Character Table...
Page 322: ...322 XMEGA B DATASHEET 8291B AVR 01 2013 Table 25 14 16 segments Character Table...
Page 412: ...412 XMEGA B DATASHEET 8291B AVR 01 2013...
Page 413: ...413 XMEGA B DATASHEET 8291B AVR 01 2013...
