270
XMEGA B [DATASHEET]
8291B–AVR–01/2013
21.4.2 SPI Frame Formats
The serial frame in SPI mode is defined to be one character of eight data bits. The USART in master SPI mode has two
selectable frame formats:
8-bit data, msb first
8-bit data, lsb first
After a complete, 8-bit frame is transmitted, a new frame can directly follow it, or the communication line can return to the
idle (high) state.
21.5
USART Initialization
USART initialization should use the following sequence:
1.
Set the TxD pin value high, and optionally set the XCK pin low.
2.
Set the TxD and optionally the XCK pin as output.
3.
Set the baud rate and frame format.
4.
Set the mode of operation (enables XCK pin output in synchronous mode).
5.
Enable the transmitter or the receiver, depending on the usage.
For interrupt-driven USART operation, global interrupts should be disabled during the initialization.
Before doing a re-initialization with a changed baud rate or frame format, be sure that there are no ongoing transmissions
while the registers are changed.
21.6
Data Transmission - The USART Transmitter
When the transmitter has been enabled, the normal port operation of the TxD pin is overridden by the USART and given
the function as the transmitter's serial output. The direction of the pin must be set as output using the direction register for
the corresponding port. For details on port pin control and output configuration, refer to
21.6.1 Sending Frames
A data transmission is initiated by loading the transmit buffer (DATA) with the data to be sent. The data in the transmit
buffer are moved to the shift register when the shift register is empty and ready to send a new frame. The shift register is
loaded if it is in idle state (no ongoing transmission) or immediately after the last stop bit of the previous frame is
transmitted. When the shift register is loaded with data, it will transfer one complete frame.
The transmit complete interrupt flag (TXCIF) is set and the optional interrupt is generated when the entire frame in the
shift register has been shifted out and there are no new data present in the transmit buffer.
The transmit data register (DATA) can only be written when the data register empty flag (DREIF) is set, indicating that the
register is empty and ready for new data.
When using frames with fewer than eight bits, the most-significant bits written to DATA are ignored. If 9-bit characters are
used, the ninth bit must be written to the TXB8 bit before the low byte of the character is written to DATA.
21.6.2 Disabling the Transmitter
A disabling of the transmitter will not become effective until ongoing and pending transmissions are completed; i.e., when
the transmit shift register and transmit buffer register do not contain data to be transmitted. When the transmitter is
disabled, it will no longer override the TxDn pin, and the pin direction is set as input automatically by hardware, even if it
was configured as output by the user.
21.7
Data Reception - The USART Receiver
When the receiver is enabled, the RxD pin functions as the receiver's serial input. The direction of the pin must be set as
input, which is the default pin setting.
Summary of Contents for XMEGA B
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