Atmel XMEGA B, User Manual

Page: 163 / 415

163 XMEGA B [DATASHEET]
8291B–AVR–01/2013
Figure 13-17 on page 163 shows the port override for a timer/counter. The timer/counter CC channel will override the
port pin output value (OUT) on the corresponding port pin. Enabling inverted I/O on the port pin (INVEN) inverts the
corresponding WG output.
Figure 13-17.Port override for timer/counter 0 and 1.
13.9 Interrupts and events
The timer/counter can generate both interrupts and events. The counter can generate an interrupt on overflow/underflow,
and each CC channel has a separate interrupt that is used for compare or capture. In addition, an error interrupt can be
generated if any of the CC channels is used for capture and a buffer overflow condition occurs on a capture channel.
Events will be generated for all conditions that can generate interrupts. For details on event generation and available
events, refer to
“Event System” on page 65 .
13.10 DMA Support
The interrupt flags can be used to trigger DMA transactions. Table 13-2 lists the transfer triggers available from the
timer/counter and the DMA action that will clear the transfer trigger. For more details on using DMA, refer to “DMAC -
Direct Memory Access Controller” on page 49 .
Table 13-2. DMA request sources
13.11 Timer/Counter Commands
A set of commands can be given to the timer/counter by software to immediately change the state of the module. These
commands give direct control of the UPDATE, RESTART, and RESET signals.
An update command has the same effect as when an update condition occurs. The update command is ignored if the
lock update bit is set.
The software can force a restart of the current waveform period by issuing a restart command. In this case the counter,
direction, and all compare outputs are set to zero.
A reset command will set all timer/counter registers to their initial values. A reset can be given only when the
timer/counter is not running (OFF).
OUT
CCExEN INVEN
OCx
Waveform
Request Acknowledge Comment
OVFIF/UNFIF
DMA controller writes to CNT
DMA controller writes to PER
DMA controller writes to PERBUF
DMA controller writes to DTHSBUF or DTLSBUF in
AWeX when in Pattern Generation Mode
ERRIF N/A
CCxIF
DMA controller access of CCx
DMA controller access of CCxBUF Input capture operation
Output compare operation