ARTERY AT32F413 Series, Reference Manual, Page: 8 / 369

AT32F413 Series Reference Manual
2022.06.27 Page 8 Rev 2.00
11.5.8 Clock control regi ster (I2C_ CLKCTRL) ....................................... 140
12 Universal synchronous/asynchronous receiver/transmitter (USART) 142
12.1 USART introduction ................................................................... 142
12.2 Full-duplex/half-duplex selector .................................................. 144
12.3 Mode selector ............................................................................ 144
12.3.1 Introduction................................................................................ 144
12.3.2 Configuration procedure ............................................................. 144
12.4 USART frame format and configuration ........................................ 145
12.5 DMA transfer introduction ........................................................... 147
12.5.1 Transmission using DMA ............................................................ 147
12.5.2 Reception using DMA ................................................................. 147
12.6 Baud rate generation .................................................................. 148
12.6.1 Introduction................................................................................ 148
12.6.2 Configuration ............................................................................. 148
12.7 Transmitter ................................................................................ 148
12.7.1 Transmitter introduction .............................................................. 148
12.7.2 Transmitter configuration ............................................................ 149
12.8 Receiver ................................................................................... 149
12.8.1 Receiver introduction .................................................................. 149
12.8.2 Receiver configuration ................................................................ 150
12.8.3 Start bit and noise detection ....................................................... 151
12.9 Interrupt requests ...................................................................... 152
12.10I/O pin control............................................................................ 152
12.11USART registers ........................................................................ 153
12.11.1 Status register (USART_STS) .................................................. 153
12.11.2 Data register (USART_DT) ....................................................... 154
12.11.3 Baud rate register (USART_BAUDR) ........................................ 154
12.11.4 Control register1 (USART_CTRL1) ........................................... 154
12.11.5 Control register2 (USART_CTRL2) ........................................... 156
12.11.6 Control register3 (USART_CTRL3) ........................................... 157
12.11.7 Guard time and divider register (GDIV) ..................................... 158
13 Serial peripheral interface (SPI) .................................................. 159
13.1 SPI introduction ......................................................................... 159