AT32F413
Series Reference Manual
2022.06.27
Page 62
Rev 2.00
4.3.13 Additional register3 (CRM_MISC3)
Bit
Name
Reset value
Type
Description
Bit 31: 10 Reserved
0x000000
resd
Kept at its default value.
Bit 9
HICK_TO_SCLK
0x0
rw
HICK as system clock frequency select
When the HICK is selected as the clock source SCLKSEL,
the frequency of SCLK is:
0: Fixed 8 MHz, that is, HICK/6
1: 48 MHz or 8 MHz, depending on theHICKDIV
Bit 8
HICK_TO_USB
0x0
rw
USB 48 MHz clock source select
0: PLL or PLL division
1: HICK or HICK/6
Note: Since USB must work at 48 MHz, HICKDIV=1 must
be guaranteed to ensure that the HICK 48 MHz is selected
as the clock source of USB 48 MHz.
Bit 7: 6
Reserved
0x0
resd
Kept its default value.
Bit 5: 4
AUTO_STEP_EN
0x0
rw
Auto step-by-step system clock switch enable
When the system clock source is switched from others to
the PLL or when the AHB prescaler is changed from large
to small (system frequency is from small to large), it is
recommended to enable the auto step-by-step system clock
switch if the operational target is larger than 108 MHz,.
Once it is enabled, the AHB bus is halted by hardware till
the completion of the switch. During this switch period, the
DMA remain working, and the interrupt events are recorded
and then handled by NVIC when the AHB bus resumes.
00: Disabled
01: Reserved
10: Reserved
11: Enabled. When AHBDIV or SCLKSEL is modified, the
auto step-by-step system clock switch is activated
automatically.
Bit 3: 0
Reserved
0xd
resd
It is fixed to 0xd. Do not change.
4.3.14 Interrupt map register (CRM_INTMAP)
Bit
Name
Reset value
Type
Description
Bit 31: 1 Reserved
0x0000 0000 resd
Kept at its default value.
Bit 0
USBINTMAP
0x0
rw
USBFS interrupt remap
0: USBFS uses the 19
th
USBFS_H and the 20
th
USBFS_L
interrupt
1: USBDEV uses the 73rd USBFS_MAPH and the 74th
USBFS_MAPL interrupt.