AT32F413
Series Reference Manual
2022.06.27
Page 258
Rev 2.00
17
Real-time clock (RTC)
17.1 RTC introduction
The real-time clock provides a calendar clock function. It has an internal 32-bit incremental couner that
is increased by one at each second. In other words, this counter serves as a second clock. The current
second value can be converted into time and date to provide a calendar function. The time and date can
be modified by modifying the counter value.
The RTC module is in battery powered domain, which means that it keeps running and free from the
influence of system reset and VDD power off as long as VBAT is powered.
17.2 RTC main features
20-bit prescaler
32-bit counter
Three RTC clock sources: HEXT/128, LEXT and LICK
Three interrupts: Second interrupt, Alarm interrupt and Overflow interrrupt
Note: The frequency of the RTC clock must be one forth slower than the
PCLK1 clock.
17.3 RTC structure
RTC consists of an APB1 interface and a RTC counter logic, as shown in Figure 17-1.
APB1 interface:
It is used to interface with the APB1 bus and battery powered domain for the
configuration and read access of the RTC registers.
RTC counter logic
: It consists of a 20-bit prescaler and a 32-bit programmable counter. The prescaler
is used to generate a RTC count clock, LN_CLK, which is usually set to 1 second in order to convert the
counter value into a calendar. As the RTC counter logic is in the VBAT domain and driven by the
RTC_CLK, the RTC still keeps running even if the APB1 interface is disabled. When the RTC_CLK
frequency is 32.768 kHz, writing the value 0x7FFF in the prescaler load register can produce a LN_CLK
of 1Hz.
The RTC counter logic is independent from the APB1 interface. The RTC registers can be configured
through the APB1 interface and synchronized to the RTC counter module through the RTC_CLK; The
associated flag bits arising from the RTC counter module is synchronized to the RTC registers by the
PCLK1. The RTC counter module is driven by the RTC_CLK. Set RTCEN=1 to enable RTC_CLK.
Configure the RTC_CLK clock source by setting the RTCSEL[1: 0]. To re-configure the RTC_CLK, it
must wait until the reset of the battery powered domain before configuration.