Systemsoftware
System- and communication configuring D7-SYS - SIMADYN D
2-43
Edition 03.2001
NMI a non-maskable interrupt
second bus clear for task-controlled access
bus clear for direct access
timeout during L/C-bus arbitration/assignment
(module missing/defective, daisy chain missing)
ready internal from L/C bus (error on another
CPU module)
ready internal from the local expansion bus (LE bus)
system bus controller overrun
timeout when accessing the local periphery
spurious interrupt (an interrupt source cannot be
identified)
direct access to the L/C bus (bypassing the
driver functions)
CPUexceptional status of the CPU
internal error
reserved Instruction
unknown Syscall
unaligned instruction fetch (jump to address which cannot
be divided by four)
user access to kernel space
unaligned load/store to coprozessor 0/2/3
unaligned load/store to L-/C-bus address space
break 6/7 not in div/mul context
unknown break value
reserved exception
task running in endless loop
FPU FPU exception status
fpu fault at non-fpu instruction
illegal fpu sub opcode
operation on NaNs
add/sub/division of infinities
mul of infinity and 0
TLB exception status of the TLB
TLB modified exception
TLB read/write miss (access to illegal address)
UTLB miss (access to illegal address)
TIME
basic cycle time failure
OFF power down
power down/reset in the normal mode
power down/reset in the stop mode (after another
exception)
2.2.2 Background processing
If the CPU has no tasks to process during normal operation, it processes
the background task.
As background task, the following functions are simultaneously available:
•
the online test mode and
•
a service utility
