Chapter 2: Introduction
20
CPC324 Features
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PIC Industrial Computers Manufactures Group Implementations:
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PICMG 2.0 CompactPCI
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PICMG 2.1 Hot Swap
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PICMG 2.5 Computer Telephony
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PICMG 2.9 System Management
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PICMG 2.15 PTMC Carrier
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PICMG 2.16 CompactPCI Packet Switching Backplane (CPSB) Node Card. 24-Port (Span),
T1/E1/J1 Edge Processor high-throughput communications controller for terminating voice or
synchronous link-layer applications
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Rear Transition Module (RTM) faceplate provides:
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24 T1/E1/J1 port connections on two 50-pin, high-density telco connectors (12 ports on each
connector)
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Two 10/100/1G Ethernet CPSB node connections optionally available on RJ45 connectors
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An alternate RTM with eight T1/E1/J1 port connections on RJ48 connectors is available
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AMCC 440GX PowerPC processor core operating at 800 MHz:
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With 32 KB Instruction and Data caches
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256 MB L2 Cache
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TCP/IP Acceleration Hardware (TAH)
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Double Data Rate (DDR) Synchronous DRAM interface (166 MHz)
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RGMII Ethernet 10/100M1G bps full duplex interface
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Serial port (16750 compatible UART)
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Dual PCI bus interfaces
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Memory:
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512 MB of 166 MHz DDR DRAM with 8-bit ECC
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128 MB application flash
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8 MB boot PROM
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Integrated 8-port 10/100/1G Base-T Ethernet switch
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Multichannel Synchronous Communications Controller (MUSYCC) supports OSI layer 2
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General purpose ISO3309 HDLC
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Signaling System Seven (SS7)
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Local PCI bus interface
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Time Division Multiplexed (TDM) switch:
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H.110 Compliant
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2,432 x 2,432 non-blocking TDM switching among local streams
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4,096 x 2,432 blocking TDM switching between backplane and local streams
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2,048 x 2,048 non-blocking TDM switching among backplane streams
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H.110 primary master, secondary master, and slave
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