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SR 25211 is not effective when switching to RUN mode.
SR 25211 should be manipulated from a Peripheral Device, e.g., a Program-
ming Console or FIT.
The status of SR 25211 and thus the status of force-set/force-reset bits can
be maintained when power is turned off and on by inserting the Set System
instruction (SYS(49)) in the program as step 00000 with the proper operand.
If SYS(49) is used in this way, the status of SR 25211 will be preserved when
power is turned off and on. If this is done and SR 25211 is ON, then the sta-
tus of force-set/force-reset bits will also be preserved, as shown in the follow-
ing table. The use of SYS(49) does not affect operation when switching to
run mode, i.e., force-set/force-reset bits always return to default status when
switching to RUN mode.
Status before shutdown
Status at next startup
SR 25211
SYS(49)
SR 25211
Force-set/reset bits
ON
Executed
ON
Status maintained
Not executed
OFF
Default status
OFF
Executed
OFF
Default status
Not executed
OFF
Default status
Refer to Section 5 Instruction Set for details on SYS(49).
3-4-4
I/O Status Hold Bit
SR 25212 determines whether or not the status of IR and LR area bits is
maintained when operation is started or stopped, when operation begins by
switching from PROGRAM mode to MONITOR or RUN modes. If SR 25212
is ON, bit status will be maintained; if SR 25212 is OFF, all IR and LR area
bits will be reset. With the CPU11-E CPU Unit, the I/O Status Hold Bit will
only be effective if enabled with the Set System instruction (SYS(49)).
The status of SR 25211 in not affected by a power interruption unless the I/O
table is registered; in that case, SR 25211 will go OFF.
SR 25212 can be turned ON from the program using the Output instruction,
or it can be turned ON from a Peripheral Device.
With the CPU11-E CPU Unit, the status of SR 25212 and thus the status of
IR and LR area bits can be maintained when power is turned off and on by
inserting the System Operation instruction (SYS(49)) into the program as
step 00000 with the proper operand. If SYS(49) is used in this way, the status
of SR 25212 will be preserved when power is turned off and on. If this is
done and SR 25212 is ON, then the status of IR and LR area bits will also be
preserved, as shown in the following table.
Status before shutdown
Status at next startup
SR 25212
SYS(49)
SR 25212
IR and LR bits
ON
Executed
ON
Status maintained
Not executed
OFF
Reset
OFF
Executed
OFF
Reset
Not executed
OFF
Reset
Refer to Section 5 Instruction Set for details on SYS(49).
The status of the I/O Status Hold Bit is maintained for power interruptions or
when PC operation is stopped.
Maintaining Status during
Startup
Maintaining Status during
Startup
SR Area
Section 3-4
Содержание SYSMAC C200H
Страница 1: ...OPERATION MANUAL C200H CPU01 E 03 E 11 E SYSMAC Programmable Controllers Cat No W130 E1 05 ...
Страница 2: ...C200H Programmable Controllers CPU01 E 03 E 11 E Operation Manual Revised June 2003 ...
Страница 3: ...iv ...
Страница 5: ...vi ...
Страница 8: ...TABLE OF CONTENTS ix Glossary 345 Index 363 Revision History 369 ...
Страница 342: ...336 Programmer Program Date Page Word Contents Notes Word Contents Notes Data Storage ...
Страница 374: ...Cat No W130 E1 05 C200H Programmable Controllers CPU01 E 03 E 11 E OPERATION MANUAL ...