9 Application Instructions API 150-199
DVP-PLC Application Manual
9-71
API Mnemonic
Operands
Function
188
MBS P
Matrix Bit Displacement
Controllers
ES/EX/SS SA/SX/SC EH/SV
Bit Devices
Word Devices
Program Steps
Type
OP
X Y M S K H
KnX KnY KnM KnS T
C
D
E
F
S
*
*
*
*
*
*
*
D
*
*
*
*
*
*
n
*
*
*
MBS, MBSP: 7 steps
PULSE 16-bit 32-bit
ES EX SS SA SX SC EH SV ES EX SS SA SX SC EH SV ES EX SS SA SX SC EH SV
Operands:
S
: Matrix source device
D
: Operation result
n
: Array length
Explanations:
1. Range
of
n
: K1 ~ K256
2.
S
designates KnX, KnY, KnM and KnS;
D
designates KnY, KnM and KnS.
3.
SA/SX/SC can designate n = 4. EH/EH2/SV can designate n
4
≦
.
4.
See the specifications of each model for their range of use.
5.
Flags: M1095 ~ M1097. See remarks for more details.
6.
This instruction performs left-right displacement on the matrix bits in
S
according to array length
n
. M1097
determines the left (M1097 = 0) or right (M1097 = 1) displacement of matrix bits. The empty bits derived from
every displacement of 1 bit (when left displacement: b
0
; when right displacement: b
16n-1
) is filled by the status of
the complement flag (M1096). The spare bits (when left displacement: b
16n-1
; when right displacement: b
0
) are
sent to the carry flag (M1095). The result is stored in
D
.
7.
The pulse execution instruction MBSP is generally adopted.
Program Example 1:
When X0 = On, M1097 = Off, indicating a left matrix displacement is performed. Set M1096 = 0 and the 16-bit
registers D0 ~ D2 will perform a left matrix displacement and the result will be stored in the matrix of the 16-bit
registers D20 ~ D22. The carry flag M1095 will be “1”.
X0
RST
MBSP
D0
D20
K3
M1097
1
b 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
b 15
0
0
0
M1096
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
0
0
S
D
1
M1095
M1095
MBS
M1097=0
Complement
flag
Before
execution
Carry flag
Carry flag
After the execution of
left matrix displacement
Содержание DVP-PLC
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