
the resulting Completion, when delivered over the requester completion interface, in the
addr_offset[15:0]
field of the
s_axis_rq_tuser
bus. In Straddled case,
addr_offset[3:2]
,
first_be[7:4]
, and
last_be[7:4]
are used to indicate second TLP
information while
addr_offset[1:0]
,
first_be[3:0]
, and
last_be[3:0]
are used to
indicate the first TLP information on that data beat.
Figure 37: Memory Read Transaction on the Requester Request Interface
Non-Posted Transactions with a Payload
The transfer of a Non-Posted request with a payload (an I/O write request, Configuration write
request, or Atomic Operation request) is similar to the transfer of a memory write request, with
the following changes in how the payload is aligned on the datapath:
• In the Dword-aligned mode, the first Dword of the payload follows the last Dword of the
descriptor, with no gaps between them.
• In the 128-bit address aligned mode, the payload must start in the second 128-bit quarter of
the first beat, following the descriptor. The payload are start at any of four Dword positions in
this quarter. The offset of its first Dword must be specified in the field
addr_offset[15:0]
of the
s_axis_rq_tuser bus
.
In the case of I/O and Configuration write requests, the valid bytes in the one-Dword payload
must be indicated using
first_be[15:0]
. For Atomic Operation requests, all bytes in the first
and last Dwords are assumed valid.
Chapter 4: Designing with the Core
PG346 (v3.3) November 16, 2022
CPM Mode for PCI Express
165