34
SLAU208Q – June 2008 – Revised March 2018
Copyright © 2008–2018, Texas Instruments Incorporated
List of Figures
35-8.
Example 4-Mux Waveforms
.............................................................................................
35-9.
Example 6-Mux Waveforms
.............................................................................................
35-10. Example 8-Mux, 1/3 Bias Waveforms (LCDLP = 0)
..................................................................
35-11. Example 8-Mux, 1/3 Bias Low-Power Waveforms (LCDLP = 1)
...................................................
35-12. LCDCCTL0 Register
.....................................................................................................
35-13. LCDCCTL1 Register
.....................................................................................................
35-14. LCDCBLKCTL Register
..................................................................................................
35-15. LCDCMEMCTL Register
.................................................................................................
35-16. LCDCVCTL Register
.....................................................................................................
35-17. LCDCPCTL0 Register
....................................................................................................
35-18. LCDCPCTL1 Register
....................................................................................................
35-19. LCDCPCTL2 Register
....................................................................................................
35-20. LCDCPCTL3 Register
....................................................................................................
35-21. LCDCCPCTL Register
...................................................................................................
35-22. LCDCIV Register
..........................................................................................................
36-1.
USCI_Ax Block Diagram – UART Mode (UCSYNC = 0)
............................................................
36-2.
Character Format
.........................................................................................................
36-3.
Idle-Line Format
...........................................................................................................
36-4.
Address-Bit Multiprocessor Format
.....................................................................................
36-5.
Auto Baud-Rate Detection – Break/Synch Sequence
...............................................................
36-6.
Auto Baud-Rate Detection – Synch Field
..............................................................................
36-7.
UART vs IrDA Data Format
.............................................................................................
36-8.
Glitch Suppression, USCI Receive Not Started
......................................................................
36-9.
Glitch Suppression, USCI Activated
....................................................................................
36-10. BITCLK Baud-Rate Timing With UCOS16 = 0
........................................................................
36-11. Receive Error
..............................................................................................................
36-12. UCAxCTL0 Register
......................................................................................................
36-13. UCAxCTL1 Register
......................................................................................................
36-14. UCAxBR0 Register
.......................................................................................................
36-15. UCAxBR1 Register
.......................................................................................................
36-16. UCAxMCTL Register
.....................................................................................................
36-17. UCAxSTAT Register
.....................................................................................................
36-18. UCAxRXBUF Register
...................................................................................................
36-19. UCAxTXBUF Register
....................................................................................................
36-20. UCAxIRTCTL Register
...................................................................................................
36-21. UCAxIRRCTL Register
...................................................................................................
36-22. UCAxABCTL Register
....................................................................................................
36-23. UCAxIE Register
..........................................................................................................
36-24. UCAxIFG Register
........................................................................................................
36-25. UCAxIV Register
..........................................................................................................
37-1.
USCI Block Diagram – SPI Mode
......................................................................................
37-2.
USCI Master and External Slave
.......................................................................................
37-3.
USCI Slave and External Master
.......................................................................................
37-4.
USCI SPI Timing With UCMSB = 1
....................................................................................
37-5.
UCAxCTL0 Register
......................................................................................................
37-6.
UCAxCTL1 Register
......................................................................................................
37-7.
UCAxBR0 Register
.......................................................................................................
37-8.
UCAxBR1 Register
.......................................................................................................
37-9.
UCAxMCTL Register
.....................................................................................................