USB Registers
1142
SLAU208Q – June 2008 – Revised March 2018
Copyright © 2008–2018, Texas Instruments Incorporated
USB Module
42.4.1.3 USBPHYCTL Register
USB-PHY Control Register
This register can be modified only when USBKEYPID is unlocked.
Figure 42-10. USBPHYCTL Register
15
14
13
12
11
10
9
8
Reserved
Reserved
PUIPE
r0
r0
r0
r0
r0
r0
rw-0
rw-0
7
6
5
4
3
2
1
0
PUSEL
Reserved
PUOPE
Reserved
PUIN1
PUIN0
PUOUT1
PUOUT0
rw-0
r
rw-0
rw-0
r
r
rw-0
rw-0
Can be modified only when USBKEYPID is unlocked.
Table 42-8. USBPHYCTL Register Description
Bit
Field
Type
Reset
Description
15-10
Reserved
R
0h
Reserved. Always reads as 0.
9
Reserved
RW
0h
Reserved. Always write as 0.
8
PUIPE
RW
0h
PU input enable. This bit is valid only when PUSEL = 0.
0b = PU.0 and PU.1 inputs are disabled
1b = PU.0 and PU.1 inputs are enabled
7
PUSEL
RW
0h
USB port function select. This bit selects the function of the PU.0/DP and
PU.1/DM pins.
0b = PU.0 and PU.1 function selected (general purpose I/O)
1b = DP and DM function selected (USB terminals)
6
Reserved
R
0h
Reserved. Always reads as 0.
5
PUOPE
RW
0h
PU output enable. This bit is valid only when PUSEL = 0.
0b = PU.0 and PU.1 outputs are disabled
1b = PU.0 and PU.1 outputs are enabled.
4
Reserved
RW
0h
Reserved. Always write as 0.
3
PUIN1
R
0h
PU.1 input data. This bit reflects the logic value on the PU.1 terminal when
PUIPE = 1.
2
PUIN0
R
0h
PU.0 input data. This bit reflects the logic value on the PU.0 terminal when
PUIPE = 1.
1
PUOUT1
RW
0h
PU.1 output data. This bits defines the value of the PU.1 pin when PUOPE = 1.
0
PUOUT0
RW
0h
PU.0 output data. This bits defines the value of the PU.0 pin when PUOPE = 1.