Comp_B Registers
853
SLAU208Q – June 2008 – Revised March 2018
Copyright © 2008–2018, Texas Instruments Incorporated
Comparator B (Comp_B)
32.3.3 CBCTL2 Register
Comp_B Control Register 2
Figure 32-10. CBCTL2 Register
15
14
13
12
11
10
9
8
CBREFACC
CBREFL
CBREF1
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
7
6
5
4
3
2
1
0
CBRS
CBRSEL
CBREF0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
Table 32-4. CBCTL2 Register Description
Bit
Field
Type
Reset
Description
15
CBREFACC
RW
0h
Reference accuracy. A reference voltage is requested only if CBREFL > 0.
0b = Static mode
1b = Clocked (low-power, low-accuracy) mode
14-13
CBREFL
RW
0h
Reference voltage level
00b = Reference voltage is disabled. No reference voltage is requested.
01b = 1.5 V
10b = 2.0 V
11b = 2.5 V
12-8
CBREF1
RW
0h
Reference resistor tap 1. This register defines the tap of the resistor string while
CBOUT = 1.
7-6
CBRS
RW
0h
Reference source. This bit define if the reference voltage is derived from VCC or
from the precise shared reference.
00b = No current is drawn by the reference circuitry.
01b = VCC applied to the resistor ladder
10b = Shared reference voltage applied to the resistor ladder.
11b = Shared reference voltage supplied to V
CREF
. Resistor ladder is off.
5
CBRSEL
RW
0h
Reference select. This bit selects which terminal the V
CCREF
is applied to.
0b = When CBEX = 0: V
REF
is applied to the + terminal; When CBEX = 1: V
REF
is
applied to the – terminal
1b = When CBEX = 0: V
REF
is applied to the – terminal; When CBEX = 1: V
REF
is
applied to the + terminal
4-0
CBREF0
RW
0h
Reference resistor tap 0. This register defines the tap of the resistor string while
CBOUT = 0.