USCI_A UART Mode Registers
964
SLAU208Q – June 2008 – Revised March 2018
Copyright © 2008–2018, Texas Instruments Incorporated
Universal Serial Communication Interface – UART Mode
36.4.11 UCAxABCTL Register
USCI_Ax Auto Baud Rate Control Register
Figure 36-22. UCAxABCTL Register
7
6
5
4
3
2
1
0
Reserved
UCDELIMx
UCSTOE
UCBTOE
Reserved
UCABDEN
r-0
r-0
rw-0
rw-0
rw-0
rw-0
r-0
rw-0
Can be modified only when UCSWRST = 1.
Table 36-17. UCAxABCTL Register Description
Bit
Field
Type
Reset
Description
7-6
Reserved
R
0h
Reserved. Always reads as 0.
5-4
UCDELIMx
RW
0h
Break and synch delimiter length
00b = 1 bit time
01b = 2 bit times
10b = 3 bit times
11b = 4 bit times
3
UCSTOE
RW
0h
Synch field time out error
0b = No error
1b = Length of synch field exceeded measurable time.
2
UCBTOE
RW
0h
Break time out error
0b = No error
1b = Length of break field exceeded 22 bit times.
1
Reserved
R
0h
Reserved. Always reads as 0.
0
UCABDEN
RW
0h
Automatic baud-rate detect enable
0b = Baud-rate detection disabled. Length of break and synch field is not
measured.
1b = Baud-rate detection enabled. Length of break and synch field is measured
and baud-rate settings are changed accordingly.