Principle of Operation
697
SLAU208Q – June 2008 – Revised March 2018
Copyright © 2008–2018, Texas Instruments Incorporated
REF
NOTE:
The legacy ADC12_A bit ADC12REF2_5V only allows for selecting either 1.5 V or 2.5 V. To
select 2.0 V, the REFVSEL control bits must be used (REFMSTR = 1).
26.2.3 Reference System Requests
There are three basic reference system requests that are used by the reference system. Each module can
use these requests to obtain the proper response from the reference system. The three basic requests are
REFGENREQ, REFBGREQ, and REFMODEREQ. No interaction is required by the user code. The
modules select the proper requests automatically.
A reference request signal, REFGENREQ, is available as an input into the REFGEN subsystem. This
signal represents a logical OR of individual requests coming from the various modules in the system that
require a voltage reference to be available on the variable reference line. When a module requires a
voltage reference, it asserts its corresponding REFGENREQ signal. When the REFGENREQ is asserted,
the REFGEN subsystem is enabled. After the specified settling time, the variable reference line voltage is
stable and ready for use. The REFVSEL settings determine which voltage is generated on the variable
reference line.
In addition to the REFGENREQ, a second reference request signal, REFBGREQ is available. The
REFBGREQ signal represents a logical OR of requests coming from the various modules that require the
bandgap reference line. When the REFBGREQ is asserted, the bandgap, along with its bias circuitry and
local buffer, is enabled if it is not already enabled by a prior request.
The REFMODEREQ request signal is available that configures the bandgap and its bias circuitry to
operate in a sampled or static mode of operation. The REFMODEREQ signal basically represents a
logical AND of individual requests coming from the various analog modules. A REFMODEREQ occurs
only if a REFGENREQ or REFBGQ is also asserted by a module, otherwise it is a don't care. When
REFMODEREQ = 1, the bandgap operates in sampled mode. When a module asserts its corresponding
REFMODEREQ signal, it is requesting that the bandgap operate in sampled mode. Because
REMODEREQ is a logical AND of all individual requests, any modules that request static mode cause the
bandgap to operate in static mode. The BGMODE bit can be read as an indicator of static or sampled
mode of operation.
26.2.3.1 Specifics for Devices With CTSD16
Devices with a CTSD16 module have two additional request signals.
The REFBGGENREQ signal represents a logical OR of individual requests coming from the various
modules in the system that require the bandgap voltage reference V
REFBG
to be available on the
V
REFBG
/V
eREF+
signal line. When a module requires a bandgap voltage reference V
REFBG
, it asserts its
corresponding REFBGGENREQ signal. When the REFBGGENREQ is asserted, the REFGEN subsystem
required to generate the bandgap voltage is enabled. This is different from the bandgap reference line,
labeled as low-power bandgap reference in the block diagram (
), which is requested with the
REFGENREQ.
The second request signal specific to devices with a CTSD16 module is the REFAFEBIASREQ. This
signal represents a logical OR of individual requests coming from the various modules in the system that
require the AFE biases. When a module requires the AFE biases, it asserts its corresponding
REFAFEBIASREQ signal. When the REFAFEBIASREQ is asserted, the REFGEN subsystem required to
generate the AFE biases is enabled.
26.2.3.2 REFBGACT, REFGENACT, REFGENBUSY
Any module that uses the variable reference line causes REFGENACT to be set inside the REFCTL
register. This bit is read only and indicates whether the REFGEN is active or off. Similarly, the
REFBGACT is active any time one or more modules is actively using the bandgap reference line and
indicates whether the REFBG is active or off.
The REFGENBUSY signal is asserted to indicate that a module is using the reference and that reference
settings cannot be changed. For example, during an active ADC12_A conversion, the reference voltage
level should not be changed.