LCD_B Controller Operation
873
SLAU208Q – June 2008 – Revised March 2018
Copyright © 2008–2018, Texas Instruments Incorporated
LCD_B Controller
With LCDDISP = 0 the LCD memory is selected, with LCDDISP = 1 the blinking memory is selected as
display memory. Switching between the memories is synchronized to the frame boundaries.
With LCDBLKMODx = 11 the LCD controller switches automatically between the memories using the
divider to generate the blinking frequency. After LCDBLKMODx = 11 is selected the memory to be
displayed for the first half a BLKCLK period is the LCD memory. In the second half the blinking memory is
used as display memory. Switching between the memories is synchronized to the frame boundaries.
34.2.5 LCD_B Voltage And Bias Generation
The LCD_B module allows selectable sources for the peak output waveform voltage, V1, as well as the
fractional LCD biasing voltages V2 to V5. V
LCD
may be sourced from V
CC
, an internal charge pump, or
externally.
All internal voltage generation is disabled if the selected clock source (ACLK or VLOCLK) is turned off
(OSCOFF = 1) or the LCD_B module is disabled (LCDON = 0).
34.2.5.1 LCD Voltage Selection
V
LCD
is sourced from V
CC
when VLCDEXT = 0, VLCDx = 0, and VREFx = 0. V
LCD
is sourced from the
internal charge pump when VLCDEXT = 0, VLCDCPEN = 1, and VLCDx > 0. The charge pump is always
sourced from DV
CC
. The VLCDx bits provide a software selectable LCD voltage from 2.6 V to 3.44 V
(typical) independent of DV
CC
. See the device-specific data sheet for specifications.
When the internal charge pump is used, a 4.7-µF or larger capacitor must be connected between pin
LCDCAP and ground. If no capacitor is connected and the charge pump is enabled, the LCDNOCAPIFG
interrupt flag is set, and the charge pump is disabled to prevent damage to the device. The charge pump
may be temporarily disabled by setting LCDCPEN = 0 with VLCDx > 0 to reduce system noise, or it can
be automatically disabled during certain periods by setting the corresponding bits in the LCDBCPCTL
register. In this case, the voltage present at the external capacitor is used for the LCD voltages until the
charge pump is re-enabled.
NOTE:
Capacitor Required For Internal Charge Pump
A 4.7-µF or larger capacitor must be connected from pin LCDCAP to ground when the
internal charge pump is enabled. If no capacitor is connected, the LCDNOCAPIFG interrupt
flag is set and the charge pump is disabled.
The internal charge pump may use an external reference voltage when VLCDREFx = 01 (and LCDREXT
= 0 and LCDEXTBIAS = 0). In this case, the charge pump voltage is set to a multiply of the external
reference voltage according to the VLCDx bits setting.
When VLCDEXT = 1, V
LCD
is sourced externally from the LCDCAP, pin and the internal charge pump is
disabled.
34.2.5.2 LCD Bias Generation
The fractional LCD biasing voltages, V2 to V5 can be generated internally or externally, independent of
the source for V
LCD
. The LCD bias generation block diagram is shown in
.
The internally generated bias voltages V2 to V4 are switched to external pins with LCDREXT = 1.
To source the bias voltages V2 to V4 externally, LCDEXTBIAS is set. This also disables the internal bias
generation. Typically, an equally weighted resistor divider is used with resistors ranging from a few k
Ω
to 1
M
Ω
, depending on the size of the display. When using an external resistor divider, the V
LCD
voltage may
be sourced from the internal charge pump when VLCDEXT = 0 taking the maximum charge pump load
current into account. V5 can also be sourced externally when R03EXT is set to control the contrast of the
connected display by changing the voltage at the low end of the external resistor divider as shown in the
left part of
When using an external resistor divider R33 may serve as a switched V
LCD
output when VLCDEXT = 0.
This allows the power to the resistor ladder to be turned off, eliminating current consumption when the
LCD is not used. When VLCDEXT = 1, R33 serves as a V
LCD
input.