Modulator
ACLK
SMCLK
SMCLK
00
01
10
11
UCSSELx
UCAxCLK
Prescaler/Divider
Receive Baudrate Generator
UC0BRx
16
UCBRFx
4
UCBRSx
3
UCOS16
UCRXERR
Error Flags
Set Flags
UCPE
UCFE
UCOE
UCABEN
Receive Shift Register
Receive Buffer UCAxRXBUF
Receive State Machine
1
0
UCIREN
UCPEN
UCPAR
UCMSB
UC7BIT
UCDORM
UCMODEx
2
UCSPB
Set UCBRK
Set UCADDR /UCIDLE
0
1
UCLISTEN
UCAxRXD
1
0
UCIRRXPL
IrDA Decoder
UCIRRXFE
UCIRRXFLx
6
Transmit Buffer UCAxTXBUF
Transmit State Machine
UCTXADDR
UCTXBRK
Transmit Shift Register
UCPEN
UCPAR
UCMSB
UC7BIT
UCIREN
UCIRTXPLx
6
0
1
IrDA Encoder
UCAxTXD
Transmit Clock
Receive Clock
BRCLK
UCMODEx
2
UCSPB
UCRXEIE
UCRXBRKIE
Set UCRXIFG
Set UCTXIFG
Set RXIFG
USCI Introduction – UART Mode
939
SLAU208Q – June 2008 – Revised March 2018
Copyright © 2008–2018, Texas Instruments Incorporated
Universal Serial Communication Interface – UART Mode
shows the USCI_Ax when configured for UART mode.
Figure 36-1. USCI_Ax Block Diagram – UART Mode (UCSYNC = 0)