DE4 User Manual
7
www.terasic.com
June 20, 2018
Figure 1
–2 The DE4 board (Bottom view)
1
1
.
.
4
4
B
B
l
l
o
o
c
c
k
k
D
D
i
i
a
a
g
g
r
r
a
a
m
m
Figure 1–3
shows the block diagram of the DE4 board. To provide maximum flexibility for the
users, all key components are connected with the Stratix IV GX FPGA device. Thus, users can
configure the FPGA to implement any system design.
Summary of Contents for ALTERA DE4
Page 1: ...DE4 User Manual 1 www terasic com June 20 2018 ...
Page 54: ...DE4 User Manual 54 www terasic com June 20 2018 ...
Page 83: ...DE4 User Manual 83 www terasic com June 20 2018 Figure 3 8 Access DDR2 SO DIMM memory ...
Page 92: ...DE4 User Manual 92 www terasic com June 20 2018 Figure 3 17 Fan Control of the DE4 ...
Page 150: ...DE4 User Manual 150 www terasic com June 20 2018 Figure 5 35 SOPC builder ...