DE4 User Manual
24
www.terasic.com
June 20, 2018
Table 2–7 User LEDs Pin Assignments, Schematic Signal Names, and Functions
Board
Reference
Schematic
Signal
Name
Description
I/O
Standard
Stratix IV GX
Pin Number
D1
LED0
User-Defined LEDs.
Driving a logic 0 on the I/O port turns the LED
ON. Driving a logic 1 on the I/O port turns the
LED OFF.
2.5-V
PIN_V28
D2
LED1
2.5-V
PIN_W28
D3
LED2
2.5-V
PIN_R29
D4
LED3
2.5-V
PIN_P29
D5
LED4
2.5-V
PIN_N29
D6
LED5
2.5-V
PIN_M29
D7
LED6
2.5-V
PIN_M30
D8
LED7
2.5-V
PIN_N30
7-Segment Displays
The DE4 board has two 7-segment displays. As indicated in the schematic in
Figure 2–10
,
the
seven segments are connected to pins of the Stratix IV GX FPGA. Applying a low or high logic
level to a segment to light it up or turns it off.
Each segment in a display is identified by an index listed from 0 to 6 with the positions given in
Figure 2–11
. In addition, the decimal point is identified as DP.
Table 2–8
shows the mapping of the
FPGA pin assignments to the 7-segment displays.
Summary of Contents for ALTERA DE4
Page 1: ...DE4 User Manual 1 www terasic com June 20 2018 ...
Page 54: ...DE4 User Manual 54 www terasic com June 20 2018 ...
Page 83: ...DE4 User Manual 83 www terasic com June 20 2018 Figure 3 8 Access DDR2 SO DIMM memory ...
Page 92: ...DE4 User Manual 92 www terasic com June 20 2018 Figure 3 17 Fan Control of the DE4 ...
Page 150: ...DE4 User Manual 150 www terasic com June 20 2018 Figure 5 35 SOPC builder ...