Stanford Research Systems SR785, Operating Manual And Programming Reference

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Status Reporting Commands 5-121
SR785 Dynamic Signal Analyzer
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ESE (?) {i} {, j}
The *ESE i command sets the Standard Event enable register to the decimal
value i (0-255). The *ESE i, j command sets bit i (0-7) to j (0 or 1).
The *ESE? command queries the value (0-255) of the status word enable
register. The *ESE? i command queries the value (0 or 1) of bit i (0-7).
When a bit becomes set in BOTH the Standard Event status word AND the
Standard Event enable register, bit 6 (ESB) of the Serial Poll status word is set.
This causes an SRQ if bit 6 in the Serial Poll enable register is set. To clear a bit
in the Standard Event status word, use *ESR?.
*
ESR ? {i}
The *ESR? command queries the value of the Standard Event status word. The
value is returned as a decimal number from 0 to 255. The *ESR? i command
queries the value (0 or 1) of bit i (0-7).
*ESR? clears the entire word while *ESR? i clears just bit i.
ERRE (?) {i} {, j}
The ERRE i command sets the Error enable register to the decimal value i (0-
65535). The ERRE i, j command sets bit i (0-15) to j (0 or 1).
The ERRE? command queries the value (0-65535) of the error status enable
register. The ERRE? i command queries the value (0 or 1) of bit i (0-15).
When a bit becomes set in BOTH the Error status word AND the Error status
enable register, bit 3 (IERR) of the Serial Poll status word is set. This causes an
SRQ if bit 3 in the Serial Poll enable register is set. To clear a bit in the Error
status word, use ERRS?.
ERRS ? {i}
The ERRS? command queries the value of the Error status word. The value is
returned as a decimal number from 0 to 65535. The ERRS? i command queries
the value (0 or 1) of bit i (0-15).
ERRS? clears the entire word while ERRS? i clears just bit i.
INSE (?) {i} {, j}
The INSE i command sets the Instrument status enable register to the decimal
value i (0-255). The INSE i, j command sets bit i (0-7) to j (0 or 1).
The INSE? command queries the value of the Instrument status enable register.
The INSE? i command queries the value (0 or 1) of bit i (0-7).
When a bit becomes set in BOTH the Instrument status word AND the
Instrument status enable register, bit 0 (INST) of the Serial Poll status word is
set. This causes an SRQ if bit 0 in the Serial Poll enable register is set. To clear a
bit in the Instrument status word, use INST?.