9 i/O PORTS (P)
S1C17153 TeChniCal Manual
Seiko epson Corporation
9-3
(Rev. 1.0)
Data input
To input the port pin status and read out the value, enable input by setting P
x
IEN
y
to 1 (default).
To input an external signal, P
x
OEN
y
should also be set to 0 (default). The I/O port is placed into high-imped-
ance status and it functions as an input port (input mode). The port is pulled up if pull-up is enabled by P
x
PU
y
/
P
x
_PU register.
In input mode, the input pin status can be read out directly from P
x
IN
y
/P
x
_IN register. The value read will be 1
when the input pin is at High (V
DD
) level and 0 when it is at Low (V
SS
) level.
The port pin status is always input when P
x
IEN
y
is 1, even if output is enabled (P
x
OEN
y
= 1) (output mode). In
this case, the value actually output from the port can be read out from P
x
IN
y
.
When P
x
IEN
y
is set to 0, input is disabled, and 0 will be read out from P
x
IN
y
.
Data output
To output data from the port pin, enable output by setting P
x
OEN
y
to 1 (set to output mode). The I/O port then
functions as an output port, and the value set in the P
x
OUT
y
/P
x
_OUT register is output from the port pin. The
port pin outputs High (V
DD
) level when P
x
OUT
y
is set to 1 and Low (V
SS
) level when set to 0. Note that the
port will not be pulled up in output mode, even if pull-up is enabled by P
x
PU
y
.
Writing to P
x
OUT
y
is possible without affecting pin status, even in input mode.
Pull-up Control
9.4
The I/O port contains a pull-up resistor that can be enabled or disabled individually for each bit using P
x
PU
y
/P
x
_
PU register. Setting P
x
PU
y
to 1 (default) enables the pull-up resistor and pulls up the port pin in input mode. It will
not be pulled up if set to 0. The P
x
PU
y
setting is ignored and not pulled up in output mode, regardless of how the
P
x
IEN
y
is set.
I/O ports that are not used should be set with pull-up enabled.
The P
x
PU
y
setting is also ignored if a pin function other than P
xy
I/O port is selected. In this case, the pull-up resis-
tor is automatically enabled/disabled according to the pin function selected.
A delay will occur in the waveform rising edge depending on time constants such as pull-up resistance and pin load
capacitance if the port pin is switched from Low level to High level through the internal pull-up resistor. An ap-
propriate wait time must be set for the I/O port loading. The wait time set should be a value not less than that calcu-
lated from the following equation.
Wait time = R
IN
×
(C
IN
+ load capacitance on board)
×
1.6 [s]
R
IN
: pull-up resistance maximum value, C
IN
: pin capacitance maximum value
Port input interrupt
9.5
The P0 ports include input interrupt functions.
Select which of the 8 ports are to be used for interrupts based on requirements. You can also select whether inter-
rupts are generated for either the rising edge or falling edge of the input signals.
Figure 9.5.1 shows the port input interrupt circuit configuration.
P0 port
interrupt request
(to ITC)
Chattering filter
Interrupt flag
Interrupt enable
Interrupt edge selection
P00
P0CF1[2:0]
P0EDGE0
P0IF0
P0IE0
P07
P0CF2[2:0]
P0EDGE7
P0IF7
P0IE7
• •
•
5.1 Port Input Interrupt Circuit Configuration
Figure 9.
