88
Data Movement Instructions
Section 3-6
DOUBLE DATA
EXCHANGE
XCGL
@XCGL
562
Output
Required
SINGLE WORD
DISTRIBUTE
DIST
@DIST
080
Output
Required
DATA COLLECT
COLL
@COLL
081
Output
Required
MOVE TO
REGISTER
MOVR
@MOVR
560
Output
Required
MOVE TIMER/
COUNTER PV TO
REGISTER
MOVRW
@MOVRW
561
Output
Required
Instruction
Mnemonic
Code
Symbol/Operand
Function
Location
Execution
condition
E1: 1st exchange
word
E2: Second
exchange word
XCGL(562)
E1
E2
Exchanges the contents of a pair of consecutive words with another
pair of consecutive words.
E2
E1
E1+1
E2+1
S: Source word
Bs: Destination
base address
Of: Offset
DIST(080)
S
Bs
Of
Transfers the source word to a destination word calculated by adding
an offset value to the base address.
S
Bs
Bs+n
Of
Bs: Source base
address
Of: Offset
D: Destination
word
COLL(081)
Bs
Of
D
Transfers the source word (calculated by adding an offset value to the
base address) to the destination word.
Bs
Bs+n
Of
S: Source
(desired word or
bit)
D: Destination
(Index Register)
MOVR(560)
S
D
Sets the PC memory address of the specified word, bit, or
timer/counter Completion Flag in the specified Index Register. (Use
MOVRW(561) to set the PC memory address of a timer/counter PV in
an Index Register.)
I/O memory address of S
Index Register
S: Source
(desired TC
number)
D: Destination
(Index Register)
MOVRW(561)
S
D
Sets the PC memory address of the specified timer or counter's PV in
the specified Index Register. (Use MOVR(560) to set the PC memory
address of a word, bit, or timer/counter Completion Flag in an Index
Register.)
I/O memory address of S
Index Register
Timer/counter PV only
Summary of Contents for CJ1G-CPU series
Page 3: ...iv...
Page 5: ...vi...
Page 21: ...xxii Conformance to EC Directives 6...
Page 169: ...148 Task Control Instructions Section 3 32...
Page 203: ...182 Programming Device Operations for Tasks Section 4 4...
Page 253: ...232 Using File Memory Section 5 3...
Page 337: ...316 Other Functions Section 6 11...
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Page 381: ...360 Revision History...