Omron CJ1G-CPU series, Programming Manual

Page: 94 / 383

73
Sequence Output Instructions Section 3-2
DIFFERENTIATE
UP
DIFU
!DIFU
013
Output
Required
DIFFERENTIATE
DOWN
DIFD
!DIFD
014
Output
Required
SET
SET
@SET
%SET
!SET
!@SET
!%SET
Output
Required
RESET
RSET
@RSET
%RSET
!RSET
!@RSET
!%RSET
Output
Required
MULTIPLE BIT
SET
SETA
@SETA
530
Output
Required
MULTIPLE BIT
RESET
RSTA
@RSTA
531
Output
Required
Instruction
Mnemonic
Code
Symbol/Operand Function Location
Execution
condition
B: Bit
DIFU(013)
B
Execution condition
Status of B
One cycle
DIFU(013) turns the designated bit ON for one cycle when the
execution condition goes from OFF to ON (rising edge).
B: Bit
DIFD(014)
B
Execution condition
Status of B
One cycle
DIFD(014) turns the designated bit ON for one cycle when the
execution condition goes from ON to OFF (falling edge).
B: Bit
SET
B Execution condition
of SET
Status of B
SET turns the operand bit ON when the execution condition is ON.
B: Bit
RSET
B
Execution condition
of RSET
Status of B
RSET turns the operand bit OFF when the execution condition is ON.
D: Beginning
word
N1: Beginning bit
N2: Number of
bits
SETA(530)
D
N1
N2
N2 bits are set to 1
(ON).
SETA(530) turns ON the specified number of consecutive bits.
D: Beginning
word
N1: Beginning bit
N2: Number of
bits
RSTA(531)
D
N1
N2
N2 bits are reset to 0
(OFF).
RSTA(531) turns OFF the specified number of consecutive bits.