![Omron CJ1G-CPU series Programming Manual Download Page 275](http://html1.mh-extra.com/html/omron/cj1g-cpu-series/cj1g-cpu-series_programming-manual_742489275.webp)
254
Index Registers
Section 6-2
The 11-instruction subroutine on the left is equivalent to the 200-instruction
subroutine on the right.
JMP
&1
MO
V
&100
D00000
MO
VR
W00000
IR2
MO
VR
T0000
IR1
MOVRW
T0000
IR0
,IR2
,IR1+
FOR
&100
TIM
,IR
O+
@D00000
++
D00000
NEXT
JME
&1
T0000
T0001
T0099
00
W000
01
W000
03
W006
ON
,IR2+
01
W000
00
W000
03
W006
Puts the PLC memory
address of T0000's
PV in IR0.
Puts the PLC memory
address of T0000's
Completion Flag in IR1.
Puts the PLC memory
address of W00000
in IR2.
Writes &100 in D00000.
Jumps the FOR-NEXT
loop if the pointers above
haven't been set.
Repeats the FOR-NEXT
loop 100 times.
If the Work bit addressed in
IR2 is OFF, TIM starts the tim-
er with the timer PV ad
dressed in IR0+ and the SV
addressed in D00000.
If the Completion Flag addressed in
IR1 is ON, OUT turns ON the Work
bit addressed in IR2.
Increments the content of D00000.
(The next address containing an SV.)
The FOR-NEXT loop starts timers T0000 through T0099 by repeating
the loop 100 times while incrementing the contents of IR0 (timer number/
PV address), IR1 (Completion Flag address), IR2 (Work bit address),
and D00000 (SV address).
TIM
0000
D00100
TIM
0001
D00101
TIM
0099
D00109
Summary of Contents for CJ1G-CPU series
Page 3: ...iv...
Page 5: ...vi...
Page 21: ...xxii Conformance to EC Directives 6...
Page 169: ...148 Task Control Instructions Section 3 32...
Page 203: ...182 Programming Device Operations for Tasks Section 4 4...
Page 253: ...232 Using File Memory Section 5 3...
Page 337: ...316 Other Functions Section 6 11...
Page 347: ......
Page 369: ......
Page 373: ......
Page 379: ......
Page 381: ...360 Revision History...