NXP Semiconductors FXTH870 D Series, Manual

Page: 133 / 176

FXTH870xD
Sensors
Freescale Semiconductor, Inc.
131
13.20 RF DATA Registers - RFD[31:0]
The RFD registers contain 256 read/write bits for the RFM to use when outputting data as described in Section 13.2 . The 256-
bit buffer is divided into two pages of 128 bits as selected by the RPAGE bit in the RFCR2. These as described in Figure 111 .
These bits are unaffected by any reset.
The data buffer is unloaded to the RF output starting with the least significant bit (RFD0) in the least significant byte (RFB0) up
through the most significant bit (RFD255) in the most significant byte (RFB31). This is often referred to as “little-endian” data
ordering. The output of this data by the RFM in all 256 bits locations is not dependent on the state of the RPAGE bit.
Bit 7 6 5 4 3 2 1 Bit 0
$003C
RFD[7:0] for RPAGE = 0, RFD[135:128] for RPAGE = 1
$003D
RFD[15:8] for RPAGE = 0, RFD[143:136] for RPAGE = 1
$003E
RFD[23:16] for RPAGE = 0, RFD[151:144] for RPAGE = 1
$003F
RFD[31:24] for RPAGE = 0, RFD[159:152] for RPAGE = 1
$0040
RFD[39:32] for RPAGE = 0, RFD[167:160] for RPAGE = 1
$0041
RFD[47:40] for RPAGE = 0, RFD[175:168] for RPAGE = 1
$0042
RFD[55:48] for RPAGE = 0, RFD[183:176] for RPAGE = 1
$0043
RFD[63:56] for RPAGE = 0, RFD[191:184] for RPAGE = 1
$0044
RFD[71:64] for RPAGE = 0, RFD[199:192] for RPAGE = 1
$0045
RFD[79:72] for RPAGE = 0, RFD[207:200] for RPAGE = 1
$0046
RFD[87:80] for RPAGE = 0, RFD[215:208] for RPAGE = 1
$0047
RFD[95:88] for RPAGE = 0, RFD[223:216] for RPAGE = 1
$0048
RFD[103:96] for RPAGE = 0, RFD[231:224] for RPAGE = 1
$0049
RFD[111:104] for RPAGE = 0, RFD[239:232] for RPAGE = 1
$004A
RFD[119:112] for RPAGE = 0, RFD[247:240] for RPAGE = 1
$004B
RFD[127:120] for RPAGE = 0, RFD[255:248] for RPAGE = 1
Figure 111. RF Data Registers (RFD[31:0])
Table 85. RFD[31:0] Field Descriptions
Field Description
RFD
15:0
RPAGE = 0
RFD
[127:0]
RF Data Registers Lower 128 bits - These are read/write bits that hold the lower 128 bits of possible data to be sent by the
RFM. Access to the lower 128 bits occurs when the RPAGE bit is clear. These bits are unaffected by any reset.
RFD
31:16
RPAGE = 1
RFD
[255:128]
RF Data Registers Upper 128 bits - These are read/write bits that hold the upper 128 bits of possible data to be sent by the
RFM. Access to the lower 128 bits occurs when the RPAGE bit is clear. These bits are unaffected by any reset.