FXTH870xD
Sensors
Freescale Semiconductor, Inc.
79
9.6.3
Channel Event Interrupt Description
The meaning of channel interrupts depends on the current mode of the channel (input capture, output compare, edge-aligned
PWM, or center-aligned PWM).
When a channel is configured as an input capture channel, the ELSnB:ELSnA control bits select rising edges, falling edges, any
edge, or no edge (off) as the edge that triggers an input capture event. When the selected edge is detected, the interrupt flag is
set. The flag is cleared by the two-step sequence described in
When a channel is configured as an output compare channel, the interrupt flag is set each time the main timer counter matches
the 16-bit value in the channel value register. The flag is cleared by the two-step sequence described in
9.6.4
PWM End-of-Duty-Cycle Events
For channels that are configured for PWM operation, there are two possibilities:
•
When the channel is configured for edge-aligned PWM, the channel flag is set when the timer counter matches the channel
value register that marks the end of the active duty cycle period.
•
When the channel is configured for center-aligned PWM, the timer count matches the channel value register twice during
each PWM cycle. In this CPWM case, the channel flag is set at the start and at the end of the active duty cycle, which are
the times when the timer counter matches the channel value register.
The flag is cleared by the two-step sequence described in
.
Summary of Contents for FXTH870 D Series
Page 86: ...FXTH870xD Sensors 84 Freescale Semiconductor Inc Figure 57 Data Flow For Measurements...
Page 171: ...FXTH870xD Sensors Freescale Semiconductor Inc 169 Figure 128 QFN Case Outline...
Page 172: ...FXTH870xD Sensors 170 Freescale Semiconductor Inc Figure 129 QFN Case Outline...
Page 173: ...FXTH870xD Sensors Freescale Semiconductor Inc 171...
